As part of CMU's Hacker Fab Course 18469/18669, students will give updates on their project work every Sunday night.

Details on the assignment can be found here: https://docs.google.com/document/d/1VIL6_VEkJ3WJWSxd1Ij3GuT30xgoiurXHgvJoFRKE7c/edit?tab=t.0

2025-02-18 Update

Since

2025-01-28 Update

Created this semester's Project Proposal and plan for improving the process database. Summary of the key deliverables by week:

1. Database schema and data model documentation

2. Revised and approved design documentation

3. UI/UX design documents and wireframes

4. Working frontend prototype

5. Working backend prototype

6. Integrated system with core features

7. Advanced features implementation

8. Complete documentation package

9. Test reports and security audit results

10. Deployed system with trained users

Update 0

Update #4

• Sandra and I patterned again and remeasured the mask design from last week to get the scale factor and graphed with best line of fit.

• Completed the mask design for the resistor lab pattern for the metrology team (code).

  • Sandra and I fabricated a trial to test alignment between two masks, but the alignment was not very successful. Further trials or a method to precisely locate and overlap previous alignment marks with the next mask's alignment are needed.

• Started outlining the demo and preparing slides, aiming to complete them early next week.

• Explored Magic VLSI but found it too outdated; also looked into gdsCAD and KLayout as potential alternatives. Will summarize benefits and tradeoffs of each tool during demo.

Roadblocks:

• Will bring up alignment issues during the demo—currently uncertain about the necessary overlap between masks or whether a patch should be used to connect two diffused areas. Exploring different approaches to solve this issue.

Plans for Next Week:

• Finalize and present demo slides on demo day.

• Incorporate feedback from demo day and collaborate with the Metrology and Stepper team to determine next steps.

• Select one tool from the explored options (gdsCAD, KLayout, etc.) to focus on and deepen understanding.

Update #3

What was accomplished:

1. Patterned chip following the Patterning SOP with mask created from Update #2 on Thursday work session.

   1. Spinner got fixed, so Sandra and I were able to fully work on end-to-end of this mini project. We got to project our mask onto the chip and observe it under the microscope.

   2. However, we were not able to calibrate the microscope to take accurate measurements of sizing because calibration slider wasn't available. Therefore, we've just took measurements using a ruler tool under the 10x microscope as shown below. Given the estimated aspect ratio, we see that it is pretty close.
2. Learned functions/scripts for creating layers with phidl & created dictionary framework for organizing diff. layers (multi-layer for metal, poly, oxide, etc.)

   1. Progress of examples is in Colab Notebook in Section "Layers - Learning"

   2. Section "Layers - Organization" contains a structured layer set
3. Creates notes on Magic VLSI Tool; Found promising information for possible integration with Hacker Fab processes

Roadblocks

1. Because we couldn't find the calibrating slider to use to get measurements on our masks on the chip, we weren't able to execute our plan of using it to get the scale factor. We will wait until the new order comes in and confirm the scale factor. For now, we will use the scale factor estimation from Kent and the measurements we've taken.

2. I wasn't able to actually walk through the tutorials for Magic VLSI because I don't have a Linux/Windows. A work around may be to run this on ECE computers only, which is fine for the exploration phase.

Plans for Next Week:

1. Sandra and I will focus on working with the Metrology/Packaging team to deliver Resistor lab pattern but with pads added on at the peripheral

2. Look more into Magic VLSI and discuss with Icey to see if this is a promising path to go down.

3. Work with Sandra to talk about how we plan on creating an initial Python framework for NMOS masks that adhere to design guidelines.

Update #2

What was accomplished:

1. Researched design constraints and rules for layout (e.g., spacing, layers). Created notes for future reference.

2. Figured out aspect ratio that reflects Stepper GUI (16:9)

3. Sandra and I recreated the current code as well as the new implementation of critical functions using phidl package tutorial.

4. Sandra and I created masks on Google Colab with rectangles of various sizes to test the scale factor of phidl grid units to micrometers.

1. Went to lab for scale factor on Sunday 1/3, followed SOP for patterning with Kent and learned how to use the stepper.

2. Discussed to the stepper team and Icey, decided to use cross with 1 elongated side as the marker shape of choice for now.

   1. This is because team only cares about rotating 90 degrees.

3. Successfully generated script that turns gds files into a png files.

Roadblocks:

1. Sandra and I were not able to complete patterning to find the scale factor because the spin coater didn't work (the vacuum was too weak so the chip kept falling off during spin).

   1. But, we understood the process of SOP so we believe we can do it once the spin coater is fixed!

Plans for next week:

1. Attempt to pattern a chip with the mask above; take measurements of different rectangles to decide the scale factor.

2. Research Magic VLSI tool.

3. Learn more about the phidl package section: Layers, and how to implement them for more complex masks.

Update #1

What was accomplished:

This week, Icey, Sandra, and I finalized our sub-project for the EDA team to be on mask automation and integrated DRC rules.

a. Sandra and I met on Wednesday, January 22nd to break down our objectives and goals for the project this semester. We established a semester-long plan outlining actionable tasks for each week. We also delved deeper into the background research on mask design and discussed the importance of building DRC rules to better understand the project’s purpose within the scope of HackerFab. We also set up weekly syncs to touch-base on each other's progress.

b. On Thursday, January 23rd, Icey helped refine our project timeline in-class to align with the objectives and deadlines of other teams, ensuring our work can support theirs as well. We planned ahead to allow for buffer time in case we encounter friction with more complicated tasks, which made me feel more comfortable with the final project timeline we decided on.

• Phase 1 (Week 2-6): Allow users to create “instances” of different components with automated mask generation.

• Phase 2 (Week 7-11): Allow instances to have tailorable dimensions and parameters, and start developing a set of DRC rules

• Phase 3 (Week 12-14): Allow users to check masks with DRC rules, and raise warnings when rules are violated.

c. Then, I reviewed the existing codebase and documentation for mask generation in the HackerFab Git repository. I also followed the tutorial to learn the PHIDL package, which the HackerFab Mask Design Program is built on to familiarize myself of what PHIDL can do. I also explored the possibility of building GUIs on PHIDL backends to create a drag-and-drop interface using Tkinter, focusing on how users can dynamically position and parameterize shapes in the layout.

Roadblocks:

a. Sandra and I need to learn how to fabricate single layers to analyze the aspect ratios used in the current mask generation code. Since we haven't started our labs, it holds us back from kickstarting this portion of our project. However, we anticipate learning the required fabrication knowledge starting with Lab 1 this upcoming Thursday.

Plans for next week:

• Continue familiarizing with Python package (PHIDL), current progress, and layer sizing for different devices in the current process. -> Create a Playbook to keep note of important features that will come to use in near future.

• Research design constraints and rules for layout (e.g., spacing, layers) and how to applies to DRC. Look at examples of DRC rules to develop robust checks (especially parameters required).

• Experiment and export GDSII files with Sandra.

• Look forward to resistor fabrication lab to form better idea of how to fabricate single layers on our own.

Update 4:

Progress tracker: https://github.com/orgs/hacker-fab/projects/34/views/1

Progress Update:

• Successfully used the Keithley 4200 to conduct CV tests for the fabed p-type MOSCap. https://docs.hackerfab.org/home/standard-operating-procedures/probe-station-sop

  • Ran high and low frequency CV tests and compared it to target CV curves for the accumulation, depletion, and inversion regions for a p-type MOSCap. Stored the data for 4 patterns on the chip

  • Debugged the Keithley 4200 controls

  • Read/skimmed through the Keithley 4200 CV test manual https://download.tek.com/document/4200%20CV%20ApplicationsGuide.pdf

  • Watched Sam Zeloof's CV testing video https://www.youtube.com/watch?v=v6Mb7J6c6og

  • Read through these two documents on CV testing Sam Zeloof linked

    • http://sam.zeloof.xyz/wp-content/uploads/2021/01/CV-resource1.pdf

    • http://sam.zeloof.xyz/wp-content/uploads/2021/01/CV-resource2.pdf

• Did a code walkthrough with Cesely for the diffusion model and loaded/ran it in google colab https://colab.research.google.com/drive/1cJ8WHxEa8jF9vQnLNw5twRnWye24PjPx

Roadblocks:

• Chatted with Cesely and she mentioned it may not make sense to edit the diffusion model code and use that to inform fabing the next set of chips as it is not accurate + a lot of assumptions were made in that model. Her suggestion was to just go ahead with fabing the next set of chips, conduct CV tests, and use those results to inform the parameter changes within the diffusion model. Beleive Jay, Cesely, and I would need to align on this path.

Next Steps:

• Work on first presentation for Hacker Fab

• Analyze results from the CV tests

• Create fabublocks for next set of chips to be fabed

• Start fabing next set of chips

Feedback

• Cesely Great job on getting your first set of results from a chip! Do you have these results documented, and have you started interpreting them? It's important to begin analyzing your data as soon as possible, as this will be crucial for your presentation and will also help guide the next set of chip fabrications.

Next Steps for CV Testing: One key aspect I want to determine from the CV testing is whether we can back-calculate carrier concentration and junction depth. These parameters will be essential for refining our understanding of the device characteristics.

Future Experiments & Model Refinement: For the next batch of chips, I suggest performing SOG diffusion while varying the drive-in diffusion parameters, specifically time and temperature. The goal is to use these variations to improve the accuracy of the current model. I have concerns about the reliability of my model due to the assumptions and experimental methods used for verification, so updating it with more accurate CV data is a priority.

Action Items: 1. Outline an experimental plan detailing how you will use CV characterization to refine the model. 2. Identify which parameters you will vary and how this will contribute to improving the accuracy of the model. 3. Once the model is updated, we can use it to make informed predictions for optimal doping levels in n-well and CMOS processes.

• Jay

  • talked with Cesely to clarify, but absolutley use her code from last semester. You need to do this in order to figure out what doping parameters to use when making MOSCaps. The point is to use the model to get close to the desired doping parameters, then test with moscaps, then tune the model, then re iterate on moscap testing with updated model to finalize CMOS doping parameters.

  • use ceselys model to determine what doping parameters you will use for the first set of moscaps, then fab them this week to stay on schedule.

Update 3:

Progress Update:

• Fabricated a p-type MOScap

  • Completed oxide growth

  • Completed aluminium evaporation

  • Created patterns

  • Patterned

  • Applied photoresist

  • Figured out correct procedure for aluminum etching

  • Learned and used the probe station to see if there was ohmic contact and optimized the aluminum etching process accordingly

  • HF etched the oxide

  • Aluminum evaporated again with new pattern

Roadblocks:

• Main roadblock was the long time it took to fabricate and improving the aluminum etching process

• Also had an issue with the evaporator on the second round of aluminum evaporation where the pressure wouldn't drop below 1e-4 hPa

Next Steps:

• Learn more about CV testing and the procedure we want to follow + understand how to interpret the different results we could see and what that tells us about the device

Responses

• From Cesely

Good work getting a MOSCap fabricated. This week we should perform a CV test on the chip and seeing if we can get the dopant concentration vs. depth and using this to compare with the model I had from last semester. We should also begin fabricating/developing a process to fabricate MOSCaps more akin to the CMOS process we hope to generate.

Also, it is not clear to me which chips you have fabricated. Did you fabricate a chip with or without the RCA clean? Or both? If you only fabricated one chip, then variations in the Al deposition might affect our observed CV results between chips and may not be related to the RCA clean.

Issues with the Al evaporator are likely caused by the chamber not being clean, since it was used this week for labs.

• From Jay

  • Please make sure to link to the notes/documentation form the fabbing process, ie pics of surface between steps, notes of errors, new findings (like Al etch rate witht eh new ethcant) etc.

  • Make sure task tracker is updated (as per the update rubric)

  • Good job working hard to get a clean moscap fabed and working through difficulties of microfabrication

  • Next steps is a little lacking I would rec

    • perform CV testing on fabed p type moscap

    • Interpret results to attain threshhold voltage, flatband voltage, and dopant profile vs depth.

    • determine doping process for CMOS represntative MOSCaps to be used based on Cesely's code from F24, and make relevant SOPs

    • Begin fabing of CMOS representative MOSCaps (this may be out of scope for the next week)

  • BTW I have the new tubes and push rod for the tube furnace

Update 2:

Progress Update:

• Did research on performing an RCA clean and wrote the SOP of the RCA clean we will conduct here: https://docs.google.com/document/d/1EJc17dcLvwOp3yGAgUv3rpoIKi2gON022oEVz9VkTkE/edit?usp=sharing

• Added initial notes for RCA clean to the CMOS process dev master doc: https://docs.google.com/document/d/1566Sux3ALGOfexcq4ajqJ6XRDOvNgEnyw1Al20tyuYY/edit?tab=t.0

• Built a FabuBlocks process for the p-type MOScap fabrication here + got feedback from Cesely : https://www.fabublox.com/process-editor/b12fd11e-5a87-4d3f-ad97-d2f436606290

• Created the solutions for SC-1 and SC-2 we will be using for the RCA clean within the fume hood

• Completed phase 1 of the Resistor lab

• Got HF training done

• Got Evaporator training done

• Got Fume Hood training done

Roadblocks:

• No current roadblocks, tube furnace seemed to have died so couldn't make the p-type MOScap last week but it seems to have been fixed so I can do that next week

Plans:

• Conduct an RCA clean following my SOP

• Fab a p-type MOScap

• Read through chapters 4 and 5 of Modern Semiconductor devices for Integrated circuits again in detail and read through dopant profiles to help with CV testing.

Responses

• From Cesely

  • Great work this week! Your documentation looks very good and professional.

    It will be imperative that you start fabricating this week as you learned last week things in the lab can take much longer than expected.

    How do you intend to measure the effectiveness of the RCA clean? Will you be comparing the results of the RCA clean by having a baseline chip with no RCA clean?

    Also, will need to make patterns for your MOS Caps. I can review how to do this with you.

• From Jay

  • Good job getting familiar with the fume hoof and setting up the RCA clean.

  • I gave feedback on fabublox process via discord, but here is what I recommended instead (to ensure we have a surface bulk contact that can be used for testing MOSCaps doped wells too): https://www.fabublox.com/process-editor/4f8374e9-d89c-4486-b54f-716cac33802e

Update 1:

Progress Update:

• Read through chapters 4 and 5 of Modern Semiconductor devices for Integrated circuits

• Did research on CV characterization

• Wrote the Project Proposal for PMOS including Junction Depth and CV characterization

• Completed pattern training with Jay

Roadblocks:

• No major roadblocks to report

Plans:

• Fab a p-type substrate

• Look more into the specific experiments we should conduct for CV characterization

• Lab next week

Responses

• From Jay

  • Critiques: For the progress update, be sure to link to the document(s) that show evidence of your progress. this week that would be a link to you project proposal

    For roadblocks, this is an opportunity to request help, or clarify what you need from us to keep moving forward. I would argue training on certain equipment to be roadblock for you.

    For plans, there should be more detail in how you're going to proceed, or link to your working doc that demonstrates your plans in more detail. For example, Fabing a p type MOSCap will require designing a fabublox process and reviewing it with someone, creating the patterns you're going to use for lithography, etc.

    For CV testing, I understand you will research specific experiments we what to do, but you should include a tentative plan of what readings youre going to look at first. This can help us guide your research more concretely.

    Overall good job!

• From Cesely

  • Great work this week. I would continue to understand and devise a plant to extract specifically the carrier concentration vs junction depth. Also, this week you should begin to fabricate MOS Caps with a p-type substrate. This will be tentative as we are waiting for a power supply for the Thermal Evaporator. In the meantime you should use Fabublox (link below) to create a fabrication process for the MOS Cap.

Update 0:

Progress Updates

• Reviewed some documentation from the Project Primer

• Had initial group meeting with the CMOS team to go over problems

• Read through assigned readings

Roadblocks

• No major roadblocks to report

Plans

• Read through chapter 1,4,5,6 in the Modern Semiconductor Devices for Integrated circuits textbook

• Read through the documents from the Project Primer

• Draft project proposal (due Thursday before class)

Weekly Update #1

I did some preliminary research, you can find the task for this in github project tracker here: xxx I drew some schematics for the Database, which can be found in the master doc here: xxx. I am facing the challenge of IV curves appearing to be limited by power so I am reaching out on the Diligent forum. My plans for next week are to do these GitHub project tracker tasks:

Weekly Update #2

I was able to complete all the Github project tracker tasks I set out to do last week as well as talk to the lab automation team to figure out what they need from us on the database.

My name is Gongwei and I will be working on the EDA device modeling this semester

Weekly Update #0

Created GitBook page.

Weekly Update #1

1. What was accomplished:

   1. Did preliminary research into Skywater SKY130 PDK, OpenLane, SPICE modeling software.

   2. Collected and read documentation on Open-source tools available for EDA and PDKs

      1. SKY130:

      2. SPICE parameter list:

      3. MOSFET modeling:

2. Roadblocks:

   1. No roadblocks at the moment.

3. Plans for the week:

   1. Extracting various preliminary MOSFET parameters for SPICE simulation (such as g_m, lambda, Vth) from some I-V, C-V graphs plotted in the previous semester from Icey.

Weekly Update #2

1. What was accomplished:

   1. Communicated with Wentao for his NMOS and SRAM I-V data from the previous semester.

   2. Plotted and analyzed preliminary MOSFET parameters for Vth.
   3. Confirmed that we need to collect more data due to the limitations of the existing I-V data points.

   4. Wrote up a plan of equations and different methods of extracting Vth, and lambda.
2. Roadblocks:

   1. No roadblocks at the moment.

3. Plans for the week:

   1. Collaborate with Ying to: classify accuracy levels for device parameter extraction and attempt extraction on existing chip 613

   2. Collect more data on Chip 613, most likely using the probe station under a larger range of Vds and Vgs

   3. Continue writeup on the parameter extraction doc of equations and different methods of extracting gm, lambda (Vth is ok).

Weekly Update #3

1. What was accomplished:

   1. Learned during Tuesday's extra training session details on how to use the probe station and parametric analyzer equipment to prepare for later work measuring and extracting parameters from our fabricated NMOS chips.

   2. Added details to parameter extraction document to have plan of analysis for our necessary SPICE Level 1 MOSFET parameters for simulation.
2. Roadblocks:

   1. A significant unexpected roadblock was that Chip 613 which we had high hopes of using for performing parameter extraction and further testing with higher V_GS values was nowhere to be found in the lab.

   2. Unfortunately, Chip 516 and 588/587 from Wentao last semester are also missing, which is a major setback where we must now take a step back and perform re-fabrication to have a functional chip to work with.

3. Plans for next week:

   1. Collaborate with Sandra and Gina to finalize the mask I drew for our test chip with 16 I/O pads, make appropriate adjustments to the Length and Width parameters, and settle on a final mask/layout.

   2. Finalize on testing plans and work with Ying and Felicia to decide on some reasonable DRC estimates for the spacing distances between the MOSFETs on the test chip and the minimum gate extension.

Update 4 (02/16/2025)

Progress Updates

• Updated substrate heater testing plans

I continued to test the substrate heater this week, with an updated testing plan following the ALD project meeting on Monday, 2/10. Instead of focusing on generating a heatmap of the entire heater surface, the new testing methodology aims to profile the time it will take the substrate heater to reach steady state given a desired temperature.

Methodology

1. Tape 2 of the thermocouples to the substrate heater, using the rough placement of the heating element as a guide. One thermocouple should be approximately over the heating wire, while another should be approximately centered in the largest gap in the heating element. The 0.5" grid as marked in the previous procedure provides a good way to record where the measurements were taken.

2. Run datalogging for the two surface thermocouples and the center (reference) thermocouple for a given voltage. I started at 5V, aiming to prevent the cracking issues that happened last week. Gradually ramp up the voltage over the course of the run (I incremented in 1.5V increments every 20 minutes)

3. Note difference between the reference point and each of the test points, as well as the difference between the two test points. A K-Type thermocouple only has an accuracy of ±2.2 C, and they are highly sensitive to the quality of contact with the surface.

Based on my testing, I feel that the Boron Nitride disks which we are using are not suitable for our purposes, partly due to cracking concerns, and partly due to low thermal conductivity. Jay suggested the use of Aluminum Nitride instead, which seems to fit our criteria a bit better. I reached out to a few vendors regarding custom AlN disks, but have not heard back yet.

• Updated CAD for QCM mount

Though it was agreed both in our team meeting on 2/10, and when speaking to Matt on 2/11 that the QCM is not necessary for the initial deposition, I still feel that it is necessary to properly design the chamber such that it can be easily retrofitted.

The only change which effects the current design revision is the movement of the substrate heater mount from the back face of the chamber to the left face of the chamber (when looking from the front). This should not change the chamber mechanics at all, and is mainly necessary to allow the precursor delivery system to sit close to the chamber, without needing to move if the QCM is added in the future.

The QCM mount itself uses a CF 2.75" to KF40 adapter as mentioned in my previous update, and simply mounts to a replacement backplate which accepts a KF40 flange. The KF40 fitting is the smallest KF style flange which can adequately accommodate the QCM mount when building the device. The CAD model shows a collision between the substrate heater mount and the QCM mount, but this will not be an issue in reality, as we can bend the QCM mount to line up with the surface of the substrate heater. It may also be worthwhile to consider redesigning the substrate heater to mount directly to the QCM mount, simply so that the QCM will be known to be at the same temperature as the heater.

• ALD stand is designed**

** Waiting for final approval from James regarding the precursor delivery

There isn't a ton to say on this front, as the design is relatively simple: an Al extrusion frame with some custom sheet metal brackets to mount to the chamber itself. We should be able to cut the mounting brackets in techspark, but will need to order the extrusion and corner brackets. Once the precursor delivery design is sorted out, we can do a final design review and place part orders. Construction itself should not take more than a couple of hours at most.

Roadblocks

• Not exactly a roadblock, but reconsidering the Boron Nitride this late into development is certainly far from ideal. I am working on some code to simulate the thermal performance of the device which can hopefully be used to inform design decisions, including whether or not to change the insulator material.

• Awaiting approval from James regarding stand dimensions

Plans

• Analyze trial data for substrate heater uniformity

• Research alternative substrate heater designs, including part lead time and sourcing

• Finalize stand dimensions and order parts

Update 3 (02/09/2025)

Progress Updates

• Constructed** substrate heater and began uniformity characterization

** The hardware used (i.e. screws, nuts, washers) is not the same as those that will be used for the final assembly, but it should not make a significant difference for the tests that we are doing

I was able to cut the top and bottom sheets for the substrate heater on the Techspark waterjet, and complete all of the required post-processing steps. By Thursday (2/6) I was able to begin testing on the fully assembled substrate heater.

As detailed in my project proposal, temperature readings are being taken on 0.5" intervals across the heater surface. I am also measuring the temperature at the "main" thermocouple (the one which will be in the final assembly) as a point of comparison. Due to the length of the testing, I was not able to do more than one run, but this week I will continue this testing and hopefully finish by Friday. Due to long test times, I have slightly revised my testing procedure from that in the project proposal:

Setup

1. Draw a 0.5" grid on the heater surface, using the center of the disk as the origin. Ideally this grid lines up with the direction of the heating wire "zig-zags".

Trial

1. Tape 3 of the thermocouples to points on the grid and record their positions (#4 is the center of the grid). Kapton tape or a similarly rated adhesive should be used. Electrical tape is pictured above and is not suitable.

2. Turn on datalogging and power supply (7V, constant voltage mode) for 20 minutes. The heater will reach approximately 100C by this time, which is lower than our operating temperatures, but should be suitable to notice any differences in the heating curves over time.

3. Turn off the power supply and allow the heater to cool down to room temperature. This will take approximately 50 minutes.

4. Move thermocouples to a new location and test again. Due to the long duration of each test trial (~70 minutes), it is likely not advisable to probe at every single point on the surface of the heater. 1-2 trails per quadrant should be sufficient to notice any problem areas, assuming that the thermocouples are evenly spaced.

Analysis

This is still WIP, but my current notes are:

• Temperatures at each probe point should be compared to the center thermocouple. This is a better choice than comparing to mean temperature or similar because we will eventually be using the thermocouple at the center of the heater as the sole point of measurement, so the uniformity matters relative to that point.

• It is important to remember that K-type thermocouples (used here) have an accuracy of ±2.2 C, so any deviations within that range are not reason for concern. At the maximum operating temperature of our heater (600 C), this goes up to ±4.5 C

• Researched passthroughs for QCM and substrate heater

Substrate Heater

The substrate heater requires lines for power and the center thermocouple. We have two primary options for these needs, either use two seperate feedthroughs for power and the thermocouples or use a single power + thermocouple feedthrough. Upon examining prices, it is apparent that it is much more economical to purchase a single power + thermocouple feedthrough, and many vendors sell feedthroughs which are rated for our power needs.

My recommendation for our project is to order from IdealVac, simply due to lead times. The other products on this list should be equivalent and could be ordered by another fab looking to replicate our device. Since we are concerned with getting the chamber working by spring break, purchasing the only option which we know can ship now makes the most sense to me.

QCM Passthrough

While talking to Matt, we discussed the idea of either directly connecting a CF 2.75" flange to the chamber, or using a KF40 to CF 2.75" adapter to allow the sensor mounts to connect to the chamber. I did some quick cost analysis and it seems that both options are roughly price equivalent.

CF on Chamber (No Adapter) | Total Cost (Est.): $1,329.47

KF on Chamber (Adapter) | Total Cost (Est.): $1,396.90

Roadblocks

• Not exactly a roadblock, but the Boron Nitride disks cracked during the initial testing of the heater. I will be looking into potential causes for this and potentially thinking of other options

• The heater testing takes much longer than I expected per trial, but I have planned around this as mentioned above. I will take measurements on a limited subset of points rather than all (49) points on the grid

Plans

• Finish substrate heater uniformity testing and gather/analyze data

• Finalize feedthrough plans and order them ASAP. Matt is currently not responding to my email, but I will follow up with him on Tuesday if he has not responded by then

• Look into the Boron Nitride cracking

Update 2 (02/02/2025)

Progress Updates

Chamber Exhaust Part Sourcing

• Created CAD of the ALD chamber and the chamber to pump line

• Sourced parts for the chamber to pump line from IdealVac

Substrate Heater Design

• Updated CAD of substrate heater

• Designed substrate heater mount

The substrate heater (pictured below) is very similar to the one which was designed during the F-2024 semester. The primary differences in the heater itself are:

• Countersink the holes in the upper plate to accommodate a #6-32 flat head screw. The plate thickness of 0.1" will just allow the bolts with a head height of 0.097" to fit without interfering with any wafers that may be placed on the surface

• Modify the bottom plate to add 3 slots, spaced 60 degrees radially apart, which are used from alignment.

In addition to the substrate heater modifications, a mounting bracket was designed, which will hold the substrate heater into the chamber. In order to minimize thermal conduction paths between the heater and the chamber walls, 3 silicon nitride balls will be used for alignment. This material should be compatible with our precursors, and has a thermal conductivity of approximately 20% of the aluminum plates. The mounting bracket has 3 holes which locate the balls, which then line up with the slots in the heater plate. Taking inspiration from the concept of exact constraint design, the balls contact the heater at exactly 6 points, constraining the heater in 6 DOF, and making removal easy in the event that the heater needs to be serviced. Additionally, the very low contact area of the lower heater plate with the balls, and the balls with the mounting bracket should further limit heat transfer by conduction, which is the primary vector that we are worried about.

• Sourced parts for substrate heater and mounting assembly

** This item can almost definitely be sourced cheaper individually (i.e. from BoltDepot or similar), but it comes down to a question of lead times at some point

Chamber Stand Design

• This is currently in beginning stages, but some basic cad of a simple chamber stand has been made

• This needs to be modified slightly from the simple box design to avoid some collisions with the line to the vacuum chamber

Roadblocks

• No major roadblocks to report

Plans

• Review substrate heater design with project leads

  • If approved, finalize sourcing and order parts

• Finalize design for chamber stand and source parts

  • Time permitting, review the design and order parts

• Once design work is finished on the substrate heater and parts are being ordered, begin research on creating Aflas O-Rings from the cording

  • Some preliminary googling indicates that a solvent weld with acetone might be possible, but I feel somewhat skeptical of the sealing quality of these O-Rings and feel that it's important to figure out how possible this sealing method is ASAP

Update 1 (01/26/2025)

Progress Updates

• Created experimental design for profiling substrate heater

• Began updating 3D CAD of the substrate heater and ALD chamber

• Reviewed literature on material compatibility with precursor materials (for heater parts)

• Drafted and submitted semester project proposal

Roadblocks

• No major roadblocks to report

Plans

• Continue to work on CAD of the chamber assembly

  • Preliminary designs for the entire heater stack, including chamber mounting by EOW

• Begin research on compatible tubing and passthroughs

• Create plan for making Aflas O-Rings from cording

Update 0 (01/19/2025)

Progress Updates

• Reviewed documentation from the Fall 2024 semester

• Had initial group meeting with ALD team to delegate roles and discuss next steps

• Began planning for ALD chamber passthroughs and substrate heater thermal characterization

Roadblocks

• No major roadblocks to report

Plans

• Review literature on material compatibility with precursor chemicals and vacuum design

• Detail experimental procedure for substrate heater characterization

  • Understand the relationship between input voltage/current and output temperature/temperature rate

  • Ensure heater uniformity

• Draft project proposal

Weekly updates for 2/9:

Tasks I accomplished:

Database is set up and configured for api endpoints that are needed for the first demo. These are POST /jobs, GET /jobs/next, and POST /job_completion. Full details of the implementation can be found in the database section of the documentation

Demo: Just photos for this week of sucessful api calls.

Roadblocks:

No significant roadblocks. I just need to pick up the cable that got delivered before using the monitor

Plans for next week:

From schedule:

• Use Postman to test all API endpoints for job management.

• Populate DynamoDB with test jobs and verify the job lifecycle (enqueue → in progress → completion).

• Create a few basic automated tests

• Justification: Automated testing is extremely important for future reliability.

Additional tasks:

Although it is officially scheduled for week 4 on the project proposal, I will make sure I get a basic API fetch working on the raspberry pi to support my demo. My demo will have me sending an API request to postman on my computer that then turns on an LED (or changes the voltage on a multimeter).

Good work, I am wondering how this would work beyond the API get/post and postman interface? As in how does it connect to a low-level machine, I am assuming since it's a HTTP request it can be handled by something running on a port on the local machine somehow, but I am curious to find out more about how this is done.

Weekly updates for 2/2:

Tasks I accomplished:

Physical hardware is set up. Raspberry PI is connected to spin coater microcontroller. I am able to send data to microcontroller using the Raspberry PI GPIO pins. I checked off these tasks in github progress tracker.

See database section of gitbook for documentation.

Weekly demo:

Roadblocks:

I do not have a micro hdmi to mini hdmi cable needed to plug the portable monitor into the raspberry pi. Solution: This has been ordered on AMAZON and will arrive within the next week or so. For the meantime, I can just connec the cable to the monitor at my desk.

Plans for next week:

Set up AWS resources: Create DynamoDB tables for the job queue and logs.

Configure S3 bucket (if needed) for job-related resources. Implement basic API Gateway endpoints using Lambda:

POST /jobs: Enqueue new jobs.

GET /jobs/next: Fetch the next job.

POST /jobs/completion: Update job completion status.

Deliverable: Can enqueue a job from POSTMAN on any computer to turn on the led (or change voltage on multimeter) connected to the GPIO pin on the raspberry PI.

Good work. I think the cable should arrive by tomorrow or so, I will let you know. If you are stuck on AWS stuff let me know. I would say just create a free account, if not I can also give you access to the HackerFab account if needed. I like the weekly demo thing, I am going to suggest that to others as well. Now that the GPIO pins can be used to send data to the microcontroller, maybe you can even try modifying the microcontrollers spin-coater script actions based off the data received to the microcontroller from the raspberry pi. If this is the next step u are working on, that's great.

Mid week update 1/30:

I got a basic test script running on the raspberry pi to turn a GPIO pin on and off

Roadblocks: There is no mini hdmi to mini hdmi cable to plug the raspberry pi directly into the portable monitor

I need headers to be able to connect the wires to the raspberry pi and the arduino (for the spincoater).

Weekly updates for 1/26:

My primary deliverable for this week was creating the plan for the rest of the semester for my role on the database team.

My roadblocks are as follows:

1. The parts from the BOM outlined in the proposal document need to be acquired. Most of the parts should be ready to use by the end of class on Tuesday

2. I do not think there is a spot on the github documentation for the database team. I will ask my teammates on tuesday to get clarification on where to document how the system I am building works. Right now, all that documentation is done in the proposal document.

Next week, I will follow week 1 of the project proposal document. Specifically, this is:

Week 1: Hardware Setup

• Assemble and configure the Raspberry Pi 5:

• specifically:

  • Install Raspberry Pi OS on the microSD card...

  • Connect and test peripherals (monitor, keyboard, mouse).

  • Ensure the Raspberry Pi can connect to CMU WiFi or Ethernet.

• Prototype physical connections between the Raspberry Pi and the spin coater's microcontroller using the breadboard and jumper wires.

• NOTE: there is an extra spin coater microcontroller that I will be able to interface with

Weekly updates for 1/19:

On thursday after class, I met with the rest of the database team. We got the repo cloned on all of our machines and we outlined what we need to accomplish by the end of the week (1/19). Our task was to browse through the current working version of the website running locally on our machines and make a list (here in gitbook) about what could be improved as a new user that has not used the website before. My list is as follows:

IDEAS FOR IMPROVMENTS:

On the homepage:

1. change the name of the button "chip summary" to "See everyone's chips" or "All user's chips", etc. As a new user to the website I wasn't sure what "chip summary" was before I clicked on it.

When I click "Input"

Then chose AluminumEtch from the dropdown menu and click submit,

I get the error as shown in the screenshot above. This is likely an edge case because I haven't added any chips yet.

When I instead choose create a new chip, I am directed to this page:

This page also is unintuitive as a new user. Why are there two submit buttons? My understanding is that you type in the number, hit submit, fill in the rest of the details, and hit submit again? All for the same chip? This is unintuitive and the first and second parts should be separate. Finally, when you hit the final submit button, there is no clear feedback that the data has been submited. The text is just cleared. There needs to be some feedback to the user (even just plain text that says "data submitted") when the form is submitted.

There should also be a clear back button to go back to the main menu.

Next, I went back to the homepage and clicked on search.

Here we have the same issue where we have two submit buttons after submitting the first form. It's not clear to the user what is supposed to be done. The first menu should be hidden after the first submit button is clicked.

Next, I typed in a search chip number and clicked submit. I am then brought to an error page. This is clearly an issue that needs to be addressed.

It is also generally unclear what we are searching for when using this search tool.

My plans for next week are TBD and will be decided after class on tuesday. It will likely include fixing a subset of the bugs I identified above.

Weekly Update #0&1 (1/13 - 1/26)

Accomplishments

• I was first assigned to the wire bonder development. I joined the wire bonder tutorial with Joe and Joel to get to know how to use it. I had a discussion with Icey, James, Joe, and Joel, and we decided to prioritize the probe station development and the other parts of IC packaging except DIYing a wire bonder for this semester. I was assigned to the development of a probe station.

• I had a discussion with Anirud and Joel to understand the current situation of the probe station (what have been finished, what not, and what I am supposed to do this semester). Anirud showed me the current prototype from last semester, which helped my understanding.

• I looked through to understand the situation more.

• I created .

• I had a discussion with Anirud, Joe, and Joel again to review my project proposal.

  • We decided to use off-the-shelf XYZ positioners and work on a DIY XYZ positioner develepment only if time allows.

  • Because we are going to use off-the-shelf XYZ positioners, we can also use off-the-shelf probes. We don't have to design and DIY them.

  • The camera can be replaced with a USB camera. Another team is also procuring one, so it might be good to obtain the same one for us. C-mount cameras might be benefitial for easy design and assembly.

  • Vacuum chuck is necessary. Lab already has a vacuum pump. We need to obtain a chuck (the one procured last semester is too large).

  • We would like to automate the Z-axis positioning. We need to attach a motor to the Z-axis of the off-the-shelf positioner.

  • Priority: finishing a working DIY probe station > auto-Z function.

Roadblocks

• These tasks might already be underway by someone, but I'll write down for record

  • XYZ positioner procurement

  • Probe procurement

  • USB camera procurement

  • Vacuum chuck procurement

• How to implement auto-Z? (Force sensor? High-res encoder?)

Plans for next week

• Design of a metallic base which XYZ positioners can be attached with magnet.

Weekly Update #2 (1/27 - 2/2)

Accomplishments

• In order to set the state where the positioners are placed higher than the chip (the probes usually go downward from the positioners), we should either

  I assume the design 2 will cost less and will be much easier to make. I can't find any downsides of this design. So we decided to go with the design 2.

Roadblocks

• Camera selection

Plans for next week

• Design an attachment to put magets to the bottom of the Amazon XYZ stage

• Design a vacuum chuck

Weekly Update #3 (2/3 - 2/9)

Accomplishments

Roadblocks

• Camera selection

Plans for next week

• Create a CAD model of an attachment for the probe holder

• Design an attachment to put magets to the bottom of the Amazon XYZ stage

• Design or procure a vacuum chuck

Weekly Update #4 (2/10 - 2/16)

Accomplishments

• I designed an attachment for the probe holder, a magnetic base for the XYZ stage, and created their CAD models.

• I discussed with Anirud and Joel whether our probe station needs proximity sensors like the patterning stepper. Because it does not need absolute positioning, we concluded that the sensors are not necessary.

• I had a discussion with Anirud and Joel about how to hold a chip on the XY stage. We are planning to use the piezo vibration sensor to detect the touch by the probe needle to the chip, for the auto Z-zero setting function. Also, the surface where a chip is put needs to be conductive for testing purposes. The problem is the piezo sensor is larger than regular chips and its face and back sides are not electrically connected. One idea is, if we use a vacuum chuck, to attach conductive tapes on the piezo sensor avoiding the vacuum suction hole so that the chip is positioned on top of the tape, and the bottom of the chip and the tape are electrically connected. Another idea is to use a double-sided conductive tape, instead of a vacuum chuck. In this case, we should fix the piezo vibration sensor using a regular tape, and attach the double-sided conductive tape on top of the regular tape, so the sensor will not be damaged when we replace the double-sided tape.

• By checking the patterning stepper, I realized the vacuum chuck can be 3D printed. It doesn't have to be a machined aluminum part.

Roadblocks

• How to hold a chip on the XY stage (details above)

Plan

• 3D print the attachment for the probe holder and assemble

• 3D print the magnetic base for the XYZ stage and assemble

• Procure magnets

• Design a vacuum chuck / test double-sided conductive tape for holding a chip on the XY stage

Weekly Update #0

I created this Gitbook page.

Weekly Update #1

The EDA team breaks down into Device Modeling and DRC Mask Design. I chose to be in the Device Modeling team helping with creating SPICE model simulation. The three of us wrote the project proposal together here https://docs.google.com/document/d/1sCj4PGeCfQZ3DJODLZkjC7j2guPgpSJxxSDldw_wTm8/edit?tab=t.0 and revised it with Icey. We divided the research work and planned to finish it before our next meeting on Tuesday. I'm in charge of researching MOSFET models with different precision along with the SPICE parameters required from each model and suggest one to follow first. Details of my work are recorded here https://docs.google.com/document/d/1GPqJ3GYlR0PzqFpR4nMNGcOII4sagbmCd-OWbnomDD0/edit?tab=t.0.

Weekly Update #2

What was accomplished:

I researched more about SPICE MOSFET level 1. I updated the main documentation with the detailed formulas used to model the level 1 simulation, including current formulas for different MOSFET working regions, explanations and formulas for each SPICE parameter, ways to measure some parameters through experiments, and what limitations this simulation model has.

Roadblocks:

One roadblock I had was that there is few documentation with enough detailed information for me to fully understand which parameters are necessary for which MOSFET level simulation. I had to research each parameter one by one in detail to see why they are needed and how they are incorporated into the SPICE model. The roadblock is resolved for now, but I'm not sure if I need any help for more precise MOSFET simulation levels.

Plans for next week:

Next week, I will collaborate with Gongwei to finish developing the parameter extraction method for all parameters for level 1 simulation. I will keep working on level 2 simulation documentation if I have time.

Weekly Update #3

What was accomplished:

Our team learned how to use the probe station to measure I-V curves for MOSFETs. Because of the roadblock described below, we designed two chip masks, one for probe station testing and one for packaged testing, and planned to do parameter extraction based on them after fabrication. I wrote a test plan based on my documentation on MOSFET level 1 SPICE simulation https://docs.google.com/document/d/1wRFp3ccW5n_bPLZD3rvi_6JWFzY__D2YDD_fRpHgOsE/edit?tab=t.0. By measuring ID vs. VGS and ID vs. VDS, we should be able to get the four required parameters for level 1 simulation.

Roadblocks:

One roadblock our team had was that chip 613, the one with the best experimental result from last semester, disappeared from lab. We were planning on measuring more data with that chip for parameter extraction, but now we have to fabricate a new one, which could delay our progress by a long time.

Plans for next week:

Next week, we will collaborate with Gina and Sandra to acquire the masks for the chips and start fabricating. I will keep working on level 2 simulation documentation if I have time.

Weekly Update #4

What was accomplished:

Our team revised the initial draft of two chip masks and the testing plan to better interface with Gina and Sandra's mask generation. I learned the requirements of hand-drawn masks, such as layers, dimensions, DRC rules, etc. I also researched the SPICE level 2 model (Grove-Frohman model) and tried to understand it (reference https://km2000.us/franklinduan/articles/hspice/hspice_2001_2-155.html).

Roadblocks:

One roadblock for drawing masks is that there are no existing DRC rules for this process. Since we want to derive parameters for device modeling, we want the chip to give consistent curves, so we followed the dimensions from previous successful chips. Another roadblock I encountered is the lack of detailed documentation for SPICE level 2 model.

Plans for next week:

Next week, we will prepare for the presentation on Thursday. I will mainly present on the SPICE simulation levels and focus on explaining the level 1 model.

1st week: reviewed the hackerfab syllabus and got registered on gitbook

Weekly Update #0 (Jan 18)

Accomplished this week

Familiarized myself with the project, by reading the project primer and F24 documentation to assess what has been completed and what are the next steps. Had the initial group meeting with the team and was presented with two problems to be tackled this semester. Performed a literature review on both problems, including the suggested reading "Modern Semiconductor Devices for Integrated Circuits" (chapters 1, 4, 5, 6). Achieved a satisfactory comprehension of both problems and became inclined toward one of them.

Roadblocks/Challenges

The major challenge was getting familiarized with new concepts. No roadblocks at the time.

Plans for next week

Determine the problem to tackle. Define a concrete plan and write the project proposal.

Weekly Update #1 (Jan 26)

Accomplished this week

Determined that I am going to be working on the metal contacts problem. Performed a literature review to better understand it. Reviewed previous documentation to assess the current state of the problem in the lab and determine what will be my first steps. Came up with a plan and wrote the proposal.

Roadblocks/Challenges

No roadblocks at the time.

Plans for next week

Will have the first training in the lab with the team. Will receive feedback from the project proposal and define concrete first steps and determine what changes need to be made to the initial plan.

Responses

• From Jay

  • For the progress update, be sure to link to the document(s) that show evidence of your progress. this week that would be a link to you project proposal

    For roadblocks, this is an opportunity to request help, or clarify what you need from us to keep moving forward. I would argue training on certain equipment to be roadblock for you.

    For plans, include more detail, or a working doc with more detail that we can look at to help give concrete advice. For example, clarify which trainings youre prioritizing to help you start fabing test devices. As for determining what changes need to be made, be specific, are we going to update the order of experiments? which experiments we will prioritize (thermal processing vs surface cleaning vs Ni contacts etc)? creating fabublox process flows for the test devices you want to make? Adding detail in you plan helps us give you advice. The more concrete plans you provide, the better we can help. These plans can be reflected in a working doc instead of typing it in the update, but be sure to link that doc and direct us on what part we should read over.

• From Cesely

  • Great work this week! I think that for the next couple of weeks the work is very well outlined for getting baseline contact resistance measurements using the transmission line method as expanded upon in your proposal. This week you should focus on making a Fabublox (link below) for the baseline testing and annealing testing as well as aim to start fabricating. https://www.fabublox.com/?code=tjb5YB9SR-N0rRKGmp6otki2udn6CikvKoSqdh_Xza4uW&state=cTBYYUpKUW4yMjZBZVFSQ2pYMm5lUlVKZC1iUHZGYkpxRnhodUJ0d2pfaQ%3D%3D

Weekly Update #2 (Feb 2)

Tasks: https://github.com/orgs/hacker-fab/projects/35/views/1

Accomplished this week:

• Completed all the training that was needed to start fabrication.

• Created Fabublox process for baseline testing (https://www.fabublox.com/process-editor/2b1a8f1f-8915-4e10-83a6-1cb50809dc19)

• Created Fabublox process for annealing testing (https://www.fabublox.com/process-editor/0bf4952c-a946-4297-88c2-b4ad10fb9143)

• Created Fabublox process for Ni contacts testing (https://www.fabublox.com/process-editor/dd27629e-aa67-4ec5-8450-e68649ff62fc)

• Defined the parameters to be extracted from IV and CV measurements (https://docs.google.com/document/d/1kRxrYw_IqMbyyWSPSQffWJJDcG3zCKjm/edit?usp=sharing&ouid=104911347651865134602&rtpof=true&sd=true)

• Started the chip fabrication for baseline testing following my Fabublox process flow

Roadblocks/Challenges:

Fabrication this week could have been better. Started with 3 chips but lost 2 in the spin coater. Decided to take this first fabrication to the end with only the remaining chip. I would say my major challenge is getting accustomed to the equipment and processes.

Plans for next week:

• In terms of fabrication, my plan is to have at least 3 viable chips ready for baseline measurements

• If everything goes well with the fabrication, the plan is also to start making some measurements with TLM and extract valuable parameters

• In parallel, I would like to start doing some research on possible differences in metal-Si contact behavior for both p type and n type Si and assess the viability of introducing these in further testings

Responses

• From Cesely

  • Great work this week!

    The spin coater can be difficult to work with. In the past I have tried ensuring that photoresist is prohibiting the vacuum or that the o-rings are clean. Another, parameter that affects its effectiveness is the size of the chip- try to keep your chips to 1 cm^2 so that they stay on. Additionally, you can try using double sided tape.

    Where are you in the fabrication process for your baseline chip? Are you varying any parameters between your three baseline chips (cleaning process, dopant concentration, etc.)? If you are varying any parameters I would make sure to deposit the aluminum at the same time on all three chips if you haven't already deposited.

    If you want you can attempt to perform a baseline p-type chip using B154. The Filmtronics Data Sheet provides good detail about junction depth/sheet resistance for their B154 SOG, which makes it easy to gauge the carrier concentration.

• From Jay

  • Good job getting trained, getting used to the fab, and beginning some chips for TLM.

  • Make sure to link updated github project tracker

  • make sure to link your notes/documentation from fabing the TLM chips

Weekly Update #3 (Feb 9)

Tasks: https://github.com/orgs/hacker-fab/projects/35/views/1

Folder: https://drive.google.com/drive/u/0/folders/1qafBxH8luKwNSnPRmJxCRI_14apNio72

Accomplished this week:

• We decided to fabricate 4 chips for the baseline testing: 2 with Aluminum and 2 with Nickel, and within those 1 p-doped and 1 n-doped (https://docs.google.com/document/d/1ySbER2cQHFqWkUeQs8Q9j2Xhx4sTrYl5xfo5lC_T_s0/edit?tab=t.0). This way we ensure the baseline testing covers several parameters and chip variations.

• I have fabricated the 4 chips side by side, according to the Fabublox process (https://www.fabublox.com/process-editor/2b1a8f1f-8915-4e10-83a6-1cb50809dc19). The fabrication was not a smooth process. I learned that a lot of things can and will go wrong, creating several stepbacks and delays in the fabrication process.

• The 2 Al chips are finalized and ready to test.

• The 2 Ni chips are currently stuck on the Nickel etching step.

Roadblocks/Challenges:

The major roadblock right now is Nickel etching. According to the deposited thickness and the etch rate, the etch time should be around 4 minutes at 40C. We used a thermistor to ensure that temperature was reached, and the Nickel was nowhere near being etched. We decided to increase the etch time, but still no luck. I plan to do some reading on this and try to find the problem.

Plans for next week:

• Make IV and CV testing on the 2 fabricated Al chips

• Research Nickel etching to find the problem with our current process

• If I am successful in etching the Nickel, I also plan to do IV and CV testing on those chips, in hopes of having the full baseline testing ready for the first demo

• I have been making daily logs with the inputs of fabrication progress, including everything that was accomplished, what went wrong, calculations, parameters, and weird things observed. I plan on going through all of these and joining them in a public document.

Responses

• From Cesely Accomplishing the fabrication this week is a big step forward. This week you should prioritize testing the Al chips and troubleshooting the Nickle chips.

Probing the Al chips should be straight forward. I can perform training with you on Friday or Saturday.

The electroless Nickle process and etching was a new process researched last semester, so I am not fully aware/familiar with the process. I’d recommend working with Daniel and meeting with him as he developed that process. Based on the issues encountered, it might be wise to fabricate some back up chips with n and p doped regions: that way once you identify the issue with the plating/etching you have chips you can quickly continue fabricating.

Additionally, as you wrap up the fabrication of our baseline chips, it will be important to finalize how we want to improve the contacts once you have collected the data. One way of doing this is by annealing the Al contacts. I would recommend that you start finalizing a fabrication and testing process.

Lastly, where are you documenting your daily logs? I do not see them in your folder.

• From Jay

  • Make sure to document what worked in terms of plating Ni, and what didn't work in terms of etching Ni (link your logs). Also make sure github tracker is up to date!

  • I would remake the p type and n type chips for testing Ni contact. But I recommend using a lift off process (now that we know the Ni may unexpectedly plate the entire surface). To do this, you would keep the photoresist on after using HF to etch the 700B SOG, then do Ni plating with the photoresist still on, then strip the photoresist. This works well with electrodeposits because they deposits because they deposit incoherent spherical particles. you may find this interesting (Shaun and I did this before): https://docs.google.com/presentation/d/1bSWTTT-sIEubeuqaU07rOFuCD53CE3sTV_890MjevvU/edit#slide=id.g2d1d23487f0_1_5, and https://docs.google.com/presentation/d/1oSqJersLTUbzyhDs-7WHrj79tlpNNgWxgJMDRFjoSxc/edit#slide=id.g2bcd2c5f16c_0_110. My hope would be to compare to results Shaun and I got, then also test Schottky barrier and annealing effects.

  • After probing the Al contact, you should anneal them and reprobe.

Weekly Update #4 (Feb 16)

Tasks: https://github.com/orgs/hacker-fab/projects/35/views/1

Folder: https://drive.google.com/drive/u/0/folders/1qafBxH8luKwNSnPRmJxCRI_14apNio72

Accomplished this week:

• This week I was out of town for most of the days so the accomplishments were not too focused on fabrication, but more on computer work.

• Did the IV testing of the 2 Al-Si chips before annealing (https://drive.google.com/drive/u/0/folders/1xUAGCG_4qKMOKwY4XnZI6zqIe8Cj1hDt).

• Annealed the chips at 250C for 15 minutes and reprobed.

• I drafted a doc with the results and interpretation of the IV testing of the chips (https://docs.google.com/document/d/1trwQnbqlPfQ9Eh84AGdTB_nJhIKhLQ6Lg6GDPYc7yvs/edit?tab=t.0).

• I have made some superficial research on what could be the Nickel etching problem but I put a pause on that research because we decided to just redo the fabrication, this time leaving the photoresist on upon Nickel deposition.

• My previous daily logs were private in my Notion app. This week I made sure to put them all together in a single public doc in the drive (https://docs.google.com/document/d/1p4lcY1_Jr3aeueYAerozEAqLVf2e0bBO/edit).

Roadblocks/Challenges:

I don't believe I have any roadblocks at the moment.

Plans for next week:

• The IV testing doc right now is simply a draft with some results pasted there. This week I want to finalize the doc with a more thorough interpretation with the resistance calculations and complete report.

• Last week I did not yet know how to perform CV testing, but I want to go through with that this week on the 2 fabricated Al chips.

• Fabricate 2 Ni-Si chips for baseline testing, this time with the photoresist on when depositing the Nickel.

• Prepare presentation 1.

• Prepare lab report 1.

• Conduct literature review on Nickel etching processes and identify potential improvements for future fabrication attempts.

Feedback

• Cesely This week you should prioritize interpreting your results from the Al contacts for presentation 1 and fabricating chips to test the nickel contacts.

Interpreting your results will be important for deciding our next steps forward. It’s not completely clear to me based on your results document which graphs correlate to the n-doped and p-doped chips as well as which graphs correspond to before and after annealing. If am understanding it correctly, it appears that annealing made the contacts more ohmic, which is a good result. You only annealed for 15 minutes at 250°C. It may be worthwhile to evaluate the effect of varying time and temperature on the quality of the ohmic contacts.

Under roadblocks you should have put that you could not perform the CV testing. The Keithley is already set up to perform CV measurements, and we simply only have to change the probe leads. I can go over CV testing during our weekly CMOS meeting and we can get some results for you to include in your first presentation.

• Jay

  • I agree with Cesely that higher temp anneal would be intersting. However, not worth making a second Aluminum chip to test this, so just reanneal the same chip at higher temps to see if there is any effect.

  • I also agree that remaking the Ni contact chip with a "liftoff" is a priority

  • Overall good job documenting preliminary results

  • We need to get on the same page about how to interpret CV testing results, and whether or not the probes should each be on a metal pad, or one probe on the probe station chuck.

What was accomplished:

1. Finished designing the peristatic pump, and got the 27:1 gear motor attached to the mechanism

2. Researched syringe pump method as an alternative option in case the peristatic pump wouldn't work. Designed several diagrams, but before reaching CAD phase, found a lot of critical drawbacks that convinced me to use the peristatic pump instead(including linear actuators that require built in encoders)

3. Start working on PPT for the presentation on tuesday

Roadblocks:

1. 3d printed parts for the pump(may be accurate, but should have initially been designed to account for clearance holes for drilling through)

2. Finding the right material for syringe pump(a glass syringe would be optimal to handle all the liquids required, but the larger models do not have built in syringe needles, so a glass syringe + recyclable needle with luer locks was thought out)

TO DOs:

1. Finalize PPT for tuesday

2. Help Advaith move the pump mechanisms into the overall assembly, as well as implementing other components(Im not sure how the spin coater is going to look like)

Week 1

This week I wrote a proposal for how I'm going to approach litho software this semester.

The proposal is available here.

Roadblocks: none, except for the lack of experience that I have in the lab. As I get more familiar with how the software is used in practice, I'll be able to develop quicker and make more informed decisions.

Plans for the week:

• implement automated photo collection when switching to UV mode

  • this will allow us to collect data automatically, which we can use when developing our approach to automatic alignment

• refactor the computer vision code (don't run on every frame), if allows

Week 2

This week I opened a PR for automated photo collection when switching to UV mode. I still need to test how the change looks on the GUI on the laptop in the fab; Tkinter displays differently on my Mac.

Roadblocks: was sick this week so was not very productive. I am feeling mostly better now!

Plans for the week:

• check and merge the automated photo collection PR

• refactor the CV code as described above

• experiment with cross-correlation-based detection of crosses (fiduciary markers)

Week 3

I had my above PR reviewed and then merged it, and fixed a subsequent issue.

Now we have autocapture, along with features in the UI for configuring it.

This week I also collected some chip image data. I ran initial tests of a few approaches — edge detection, template matching, and skeleton-based shape analysis. I haven't had good results with these but I think it is worth spending more time trying to get them to work before considering other options. In particular, I just need to take the time to try different settings and hyperparameters. I pushed the code to a dev branch.

The roadblock has just been time, as I have been in a busy season these past weeks, which should hopefully end after this week. I will have more time after this coming week — and I will make sure we have a working solution that is in use at least by the end of the semester.

This week:

• continue to experiment with detection + get something good enough to demo

Week 4

This week I got something good enough to demo!

Building off of the work from last week, I achieved good results with thresholding and contour-based detection. For reference, here is the output of the detection code that was previously in the stepper repository (and still there) on a sample image:

And here is output of the new code I wrote:

Notice that we detect all four markers in this image.

What we have now is good, but it can be improved.

In particular, we still need to handle false positives better and output less of them. We also struggle when the markers are not as bright. Here's an example of a failure case:

In this case, the markers appear darker (as can be easily seen in the thresholded image) and we miss them. We want to be more robust than this.

I am starting to think that a convolutional-based detector that we finetune might be a better approach than using traditional techniques; although I think it's worth spending a bit more time trying to get template matching to work consistently, which I will do.

We made big improvements this week but we're not there yet. I want to have reliable detection by the end of the week. I'll be experimenting more with template matching and also YOLOv11, which is a real-time object detector that performs well in a wide variety of settings.

The only roadblack has been time, but this should be mostly unblocked after Tuesday for me.

Week 4 Feedback (Kent Wirant):

• These are some great results! Looking forward to seeing improved accuracy over a wider range of patterns as well.

• In the future, please make sure the GitHub repository is up to date with the changes you make to the code. Also be wary of documenting your process and thinking in the Development Log in the Master Document and task status in the GitHub project tracker (finer-grained tasks make this easier).

• For future planning, convolutional based fiducial mark detection is worth considering, but some more detail and justification as to why and how you are implementing this is necessary.

Update 0

Accomplishments

• Read through sputtering documentation and project primers

• Read through required textbook chapters and 'Filling in the Gaps' resources

• Met with project partner Katie to go through project goals and potential avenues forward

• Walked through state of current sputter chamber with team leads

Roadblocks

• No major blocks so far

Plans

• Literature review of current characterization techniques

• Meet with Katie to draft project proposal and timeline

Update 1 (1/19-1/26)

Accomplishments

• Drafted project proposal and timeline

• Researched thin film characterization techniques

• Submitted requests for training on XRR (with Professor Sokalski) and AFM

• Compiled existing sputtering chamber setups from online sources into spreadsheet

• Performed sputtering trials using Aluminum target + practiced tuning pressure using Argon flow rate and vacuum strength to maintain stable plasma

Roadblocks

• Priority is figuring out why the sputtering current is so low + how to tune sputtering parameters to improve power

Plans

• Get trained on XRR next Thursday

• Continue literature review

• Sputtering trials with Aluminum target --> Try sparking using high flow rate to create dense plasma then lowering pressure to increase amount of sputtered particles that reach the substrate

Responses

• From Jay

  • For the progress update, be sure to link to the document(s) that show evidence of your progress. this week that would be a link to you project proposal

    For roadblocks, this is an opportunity to request help, or clarify what you need from us to keep moving forward. I would argue training on certain equipment to be roadblock for you.

    For plans, there should be more detail in how you're going to proceed, or link to your working doc that demonstrates your plans in more detail. For example, link what literature you plan to read first, this helps me guide your research. What do you want to learn form theses trials? why is it useful in working towards the end goal. For example you could discuss the methodology for DC al sputtering and how that informs the development of reactive DC AL2O3 sputtering. Being specific helps me evaluate if your plans for the week will actually end up being productive. Based on Fridays session, ik that you have more specific well justified plans, so be sure to articulate them here, or better yet, direct me to a document that articulates your plans.

Update 2 (1/20-2/2)

Accomplishments

• Met with Professor Sokalski to discuss XRR

• Assisted chamber modifications for RF sputtering

• RF Sputtering trial with Aluminum target

  • learned how to use RF sputtering equipment and fundamentals behind impedance matching

• Chamber bias literature review

• Completed AFM online training and reached out to MCF contact for in-person training

Roadblocks

• Main roadblock is still sputtering chamber not working - will continue to look into specific reasons why target seems completely unscathed after a few hours of being near plasma

• Some of the RF sputtering electronics are cooked

Plans

• AFM in-person training

• Continue sputtering chamber debugging - both literature review and in-person tests

• Ideally also XRR in-person training, depends on how fast MCF contact responds.

Responses

• make sure to link working notes, and updated project tracker

• Good job finalizing choice of XRR for characterization

Update 3 (2/2-2/9)

Accomplishments

• Completed XRR training with Besty

• Completed AFM training

• Contacted Andrew to ask about correct AFM tips

• Helped perform sputtering tests on Thursday and Saturday to try to debug chamber

Roadblocks

• Sputtering chamber still not working - blocking capacitor seems like promising solution

Plans

• Perform sputtering test with Aluminum Oxide/Insulating material to test blocking capacitor theory

• Perform XRR on sample similar to expected sputtering chamber output

• Start writing SOPs + Drawing out schematic of characterization pipeline

Responses

• From Jay

  • Good job completing both AFM and XRR training, good job helping with sputter chamber debugging.

  • As discussed in person, RF sputtering test wont be fruitful until we implement a blocking capacitor. So I would prioritize XRR practice on oxide and evaporated Al samples.

  • DC Al sputter tests may still be interesting this week.

  • Please make sure to links to working docs, and an updated github project tracker.

Update 4 (2/9-2/16)

Accomplishments

• Created Aluminum thin layer samples using the thermal evaporation chamber

• Attempted XRR on samples

  • Seemed to be unsuccessful - potentially issues with surface roughness, or sample size.

• Helped perform sputtering tests on Thursday with the blocking capacitor to try to debug chamber

• Placed order for AFM tips - turns out Joel has some

Roadblocks

• Sputtering chamber still not working : (

Plans

• Perform XRR on thermally grown oxide -> hopefully better surface roughness and larger sample size will result in visible results

• Track down AFM tips and try to perform AFM on thermally evaporated Al samples to get rough idea of surface roughness

• Continue literature review/researching potential causes for sputtering chamber not working.

Responses - Jay

• Given the chamber roadblocks, I think continuing to workout XRR with thermal oxide and sanity checking the evaporated Al samples with AFM techniques makes sense.

• Rahim and I are working on upping the Vp-p of th rf supply in hopes that low Vp-p has been the issue. If this doesnt work, we will start doing reactive DC with V1 chamber.

Update 0

Progress

• Researched pinch valves for new system design and suggested to the team.

• Looked into high torque motors and stepper motors with gearboxes so I can increase the torque being applied on the peristaltic pump.

• Chose a new motor to order to revamp the system.

Roadblocks

• None. I just to need to order parts.

Plans

• I will update the peristaltic pump 3d model to be compatible with a stepper motor that has a gear box attached.

• I will order a stepper motor that has a gear box.

• I will work on code for making the stepper motor move more smoothly.

Update 1

Our project objective has changed to a single integrated design for spin coater and heating since last week. I still am working on liquid handling, but Matthew is doing the On-shape CAD for the pump instead.

Progress

• Researched fittings & valves that work with our chemicals.

  • Polypropylene will work for most of our chemicals. It is very compatible with HMDS, Acetone, IPA, AZ P4210 (Photoresist). It is likely also compatible with Spin-on-glass 700B and P504 based on their compositions.

  • There are fully polypropylene valves we can use and just attach an actuator to instead of making our own valves and I think we should pursue this if it will take up less space.

• Ordered a stepper motor with gear box and the appropriate components to drive and power it.

• Worked on stepper code.

Roadblocks

• I am waiting for the parts I ordered to arrive.

Plans

• Meet up with Matthew and 3D print the peristaltic pump CAD from On-shape.

• Test pump functions.

• Look into how we can order the fittings and valves.

Update 2

Progress

We can order propylene fittings and valves from:

• John Guest Push-to-Connect Fittings

• Jaco Kynar Compression Tube Union Tees

• SP Bel-Art T Shaped Tubing Connectors

I worked on CAD for holding the tubes over the frames. It is parameterized and you can change the number of tubes.

I looked into position sensing methods for determining the location of the spin coater (ultrasonic, infrared, laser). We settled on infrared for the design.

To successfully laser cut a wafer we would need high powered lasers (100 W to 200W) depending on if we are using a fiber laser or Nd: YAG Laser. This would cost thousands of dollars just for the appropriate laser, so I don't think it will be worth it for our purposes. Also, a fume hood is not proper ventilation for laser cutting a wafer, so we would need to make a ventilation solution as well.

We could get a weaker and cheaper laser and only use it for wafer scribing (in which case we would still separate the wafer using clean cut pliers). However, I think this would still result in kerf-loss. I think for our purposes (1 cm * 1 cm chips), diamond scribing is good enough especially for a V1, but I would be curios to hear what other's think.

Roadblocks

• The pump CAD was not finished this week, and our motor did not arrive yet.

Plans

• I am working on a CAD to hold the heat gun, should be done by EOD Monday.

• Work on presentation and assembly with team.

• Hopefully motor will be here. If it is, Matthew and I will test the pump.

Update 3

Progress

• Found a peristaltic pump in Ideate, took it apart and reconstructed it with our tubing. I haven't gotten it to work yet, so I will trouble shoot it to see if the motor even works.

• 3D printed, built, and tested custom peristaltic pump with Matthew. Took a while to debug but it works, need to test with water now. Wired Nema 17 with 27:1 gear box to motor controller and an Arduino Nano Every and a 24 volt power supply.

• Finished CAD for holding heat gun with set screws.

Roadblocks

• Custom peristaltic pump switches directions when I increase the speed too much, so I need to investigate the limits so we can have predictable operation.

Plans

• Test peristaltic pump with water

• Electrical diagram

• Demo 1 Presentation

Update 4 - 2/16/2025

Accomplishments

• See project tracker here: https://github.com/orgs/hacker-fab/projects/36/views/1

• Evaporated Al onto two chips to use for XRR/AFM testing with Melinda. The final size from the QCM was around 1.6 k Angstroms, so slightly larger than what we were aiming for (1 k Angstrom), but still workable. If we evaporate again we need to remember to set the current to lower than 45A to start. We also had a bit of trouble getting the chips off the tape so they ended up a tad bit scratched, which may have contributed to rough XRR results. Hopefully this means we will have many observable features on AFM though.
• Observed/helped out with another RF sputtering trial at high pressure, but unfortunately nothing was deposited again :( There was a strange shiny-ness (see below, the almost blue tinted splotch near the top) observed on the Al target after, but really no other evidence of sputtering

• Performed XRR trial with Jay and Melinda on one of the evaporated chips, took many pictures/videos to be used for SOP (see folder with pics/videos here: https://drive.google.com/drive/folders/1gZTIkKDhvZFrmSh1t8Wdxa14xSfIIauH?usp=sharing

  • Data from the test can be found here: https://drive.google.com/drive/folders/1KTogftj_zDFrn7nC8pkHbGv47KBVDxv9?usp=sharing

Roadblocks

• Obviously, the main roadblock right now is the fact that RF sputtering isn't working. I've been doing some researching and aside from being able to check the DC bias of the plates in the chamber (which to my understanding would be pretty difficult), I'm not really sure what else we can test with RF sputtering. I'd like to go back to DC sputtering to just double check that everything with the chamber is functional for that process. I think we will be able to narrow down the problem more efficiently regardless of the outcome of the DC sputtering trial, because at least we'll know it's either the chamber system itself or the RF system. Reproducibility of results is very important, as I have had to learn in my other research projects :) After that, we can eventually use the other power source (hopefully, if it works) from the Nanofab.

Plans

• Finish presentation for presentation on Tuesday

• Start writing SOP for AFM (Melinda is going to do XRR)

• Perform DC sputtering trial as a sanity check, then start narrowing down what could be wrong with RF sputtering (assuming nothing is wrong with the chamber itself)

• Get AFM tips from Joel

• Perform an AFM trial on evaporated Al chip samples

• Grow some aluminum oxide in the furnace for further AFM/XRR testing

Responses - Jay

• Given the chamber roadblocks, I think continuing to workout XRR with thermal oxide and sanity checking the evaporated Al samples with AFM techniques makes sense.

• Rahim and I are working on upping the Vp-p of th rf supply in hopes that low Vp-p has been the issue. If this doesnt work, we will start doing reactive DC with V1 chamber.

• Overall thankyou for the well detailed update with pics!

Update 3 - 2/9/2025

Accomplishments

This week, I:

• Did AFM training with Melinda (see pictures of notes). There are a lot of different settings we'll have to mess with in order to get good images, but I am confident we will be able to do so. Andrew in MCF is also super helpful, and I'm sure he could help us in our first few sessions if necessary. I think this will be a good sanity check to the results we get from XRR.

• Did XRR training with Jay and Melinda (see picture of my notes). Assuming we can actually get samples next week I'd like to start running trials right away because I think this will be able to provide us with a lot of good information about thickness and potentially density.

• I also helped run several different trials of the sputtering chamber this week.

  • On Thursday, we discussed the new chamber development and the state of the current chamber. I suggested removing the top plate because based on my understanding, we were basically creating a second sputtering chamber on top of the one we wanted. I thought this because of the common occurrence of plasma appearing between the top two plates, and wondered if this could be pulling a lot of power and preventing significant sputtering on the chip. However, removing the top plate didn't work, as can be seen in the image below, because the plasma just kind of spread out even further.

• Melinda and I spent some time on Saturday reviewing literature to find examples of other sputtering trials, which can be found here: https://docs.google.com/spreadsheets/d/1TKB6aHW9vdk9iT3zZkKUyYFrIMQ4lUR3xLNAh300AFA/edit?gid=465241598#gid=465241598. We also were brainstorming what could be wrong with the chamber, then joined Jay and observed him running another sputtering trial. He figured out that our system was missing a blocking capacitor and that was likely why we hadn't been sputtering anything!!! Because (to my understanding, I still need to read into this more, ECE stuff is hard lol) the AC current will just resolve any charge buildup between the plates that causes sputtering within a few cycles.

Roadblocks

• The main roadblock was the fact that the sputtering chamber has not been able to produce a sample for us to start testing yet... But hopefully with the addition of the blocking capacitor that will change!

Plans

• Purchase AFM tips after Andrew gets back to us about the best ones to buy

• After the blocking capacitor is added, make some sputtered aluminum samples!!!

• Assuming we can successfully get samples, I'd like to perform a few XRR trials and practice quantifying thickness. I also want to do some AFM.

  • Even if we can't get samples, I'd like to take some chips with either spin on glass or some kind of patterning to practice looking at under AFM and getting rid of image artifacts.

• Read more about RF sputtering and how it works so I can solidify my understanding of the system and why we need a blocking capacitor.

Response - Jay

• Good job completing both AFM and XRR training, good job helping with sputter chamber debugging.Comment

• As discussed in person, RF sputtering test wont be fruitful until we implement a blocking capacitor. So I would prioritize XRR practice on oxide and evaporated Al samples.Comment

• Based on: https://www.lesker.com/newweb/ped/rateuniformity.cfm I worry that the oxide sputter test (hoping oxide acts a blocking cap itself) may not be a good use of time, since we may have to sputter for ridiculous amounts of time to see anything). Which is also another good reason to do Reactive Al Rf sputtering instead of Al2O3 target sputtering.Comment

• DC Al sputter tests may still be interesting this week.

• Please make sure github project tracker is accurate and updated

Update 2 (02/02/2025)

Accomplishments

• Met with Professor Sokalski to learn more about XRR and how it works. It seems like it will be the best tool to determine sample thickness and potentially density. I took notes during the meeting that can be found here: https://docs.google.com/document/d/11MBv83tX0nFboJv7nk2iF1xpBTiB1wlXRQb5I7Rys-I/edit?tab=t.0

• Ran an RF trial on the sputtering chamber with Jay, Melinda, Rahim, and Ayan. We tested several different parameter combinations, starting by changing the frequency, then altering the argon pressure and thus chamber pressure. Unfortunately, nothing was sputtered onto the slide and a piece of the system broke during our test. I recorded observations and the parameters tested, which can be found here: https://docs.google.com/document/d/1djYb2jFaWNsHtIddbWhw9eNRoR0uh7QR40o2pBkO11E/edit?tab=t.0

• I did the first lab! (And only dropped the chip like three (?) times)

Roadblocks

• The main roadblock is that so far we haven't got the chamber to sputter an observable layer. Jay, Melinda, and I are going to scour the literature to try and determine the problem (maybe DC bias on the target, maybe something else) and find a solution.

Plans

• Do AFM training with Melinda this Thursday (it can complement XRR so I think it's worth having the option)

• Read more literature to try and find a solution to the lack of sputtered material

• Perform more RF trials and try to get samples to use for XRR/AFM so we can start developing a protocol

• Do the next part of the lab

Responses - Jay

• make ssure youre updating project tracker

• Good job finalizing choice of XRR for characterization

Update 1 (01/26/2025)

Accomplishments

• Saw and helped operate the sputtering chamber twice

• Developed proposal with Melinda for what we are going to accomplish for the sputtering process this semester

• Worked with Jay and Melinda to make our first samples

• Requested AFM training, scheduled a meeting with Professor Sokalski to discuss XRR/XRD for thin films

Roadblocks

• Nothing aside from being out of town this past weekend, which just meant I didn't have time to do much work

Plans

• Start reading literature on how to characterize thin films with XRR, AFM, and other techniques

• Perform more sputtering trials and get better at operating the chamber independently

• Do the first lab

Update 0 (01/19/2025)

Accomplishments

• Read sputtering documents from last semester, read project primers

• Did the prereadings and spent time making sure I understood the fabrication processes as this is mostly new information for me

• Met with my partner Melinda for the sputter process project and helped each other understand the current state of the project and our task

• Met the rest of the sputter team and saw the sputter chamber in person to see how it works

Roadblocks

• Nothing major so far, there's just a lot of new content to learn quickly but I think I have a good handle on it

Plans

• Review external literature to prepare for project proposal

• Meet with Melinda to discuss our plans and split up responsibilities

• Draft project proposal

The lab automation team received an update this week that we basically had to re-vamp a large portion of the project, since the gantry was(apparently) no longer deemed necessary. Our goals were reset so that everyone on the team was set to work on the "NEW" lab automation plan, which was to combine the liquidation handling, the spin coater, and the thermal heating system.

For starters, me and the rest of the team took a look at an iteration of the three in one spin coater that was already on the internet(and made at an extremely cheap price) as well.

Of course, since this was an extremely low budget design, we realized that there were several improvements we could make. For starters, the liquid handling system is basically composed of a single syringe, as well as a better solvent catch bowl system to collect excess liquids. Along with that, a more efficient vacuum system would benefit the spin coater, since the current iteration does not suction the silicon hard enough to keep it in place consistently at higher rpm.

When it comes to major roadblocks, several new variables came into mind once we decided to merge all the components of lab automation into one. The biggest one for sure as of now, is the fact that we may have to pursue a different filament or material for the base of the spin coater due to there being a solid chance of it not being able to withstand the heat. The original spin coater was also not stationary enough(due to how light it was), so utilizing aluminum as the base instead was a suggestion that came to mind. Other roadblocks include, as mentioned, improving the vacuum system of the spin coater, minimizing motors(since the less moving parts, the easier time we will have), and attaching an updated liquid handling system that can alternate between different chemicals(since we have to differentiate which liquids are which within the tube)

For next week, I plan on initially CADing the base design of the spin coater(while taking into account the liquid handling + thermal heating) , and attempting to help Adwoa move her Fusion360 file of the perstaltic pump to onshape(while maintaining her sketches).

Before receiving updates on what I was supposed to work on this week, I helped Anirud re-CAD and 3d print several modified components of the Spin coater. The dimensions of the spin coater were increased in length by 45 mm, and the holes for buttons were more enclosed together due to wire entanglement concerns, and the buttons not being fully optimized for assembly. Along with that, the holes for motor attachment were slightly modified so that all four screw holes would accurately fit in the motor. The height of the vase was also slightly decreased to account for the addition of a top plate on the spin coater. All of these revisions ended up significantly increasing the efficiency of the spin coater's ability to hold silicon in place. The only major roadblock along the process was failing to recognize that the BAMBU 3d printer had different setting from the default BAMBU settings, as well as the PRUSA filament toppling over, resulting in some prints being scrapped.

I additionally began to conduct research on the pinch valve mechanism that I discussed with my fellow lab automation teammates, and began investigating the pros and cons of utilizing such a design in contrast to the original peristaltic pump. The pros include the fact that the basic mechanism for the pinch valve is a lot less complex, since it involves one or two motor simply twisting a screw to completely enclose water flow. The major downside is that a large majority of pinch valves attempt to "pinch" by enclosing both sides of the tube instead of only one. The largest road block as of now, is figuring out if there is an efficient pinch valve design capable of "pinching" the tube on both directions with one motor, while also being compact enough to fit with the rest of the lab automation components. Furthermore, the pinch valve is not suited for high temperature purposes, and I am not completely sure what temperatures the liquids will be operating in.

For next week, I plan on CADing two or three different iterations of the pinch valve, depending on if I determine that pinching the tube on both ends is possible with one motor. If possible, I will attempt to use FEA to determine if the liquid flow through the valve is minimized and compare the designs and check which one offers the least liquid flow.

https://tameson.com/pages/pinch-valve(resources used for general understanding)

Update 0

Focus for this week is to create a plan to quantify the errors in the current litho stepper. Work on my tormach 440 cnc machine to have "in house" machining capability.

Preliminary Readings: ISO 230 Geometric accuracy of machines operating under no-load or quasi-static conditions, Foundations of Mechanical Accuracy, Precision Machine Design.

Next Steps

Create a project proposal

Update 1 (1/26/2025)

Accomplishments

• Created project proposal, received input from litho-stepper team and edited the proposal by added target values for mechanical accuracy of proposed nano-positioner.

• Welded a steel coolant tank using TIG (tungsten inert gas) welding. Leak tested the coolant tank by filling it with water and waiting to see if the tank leaked. There were several pinhole leaks.

• Looked at the cad files for this open source piezo nano-positioner. https://www.sciencedirect.com/science/article/pii/S2468067222000621

• Created spreadsheet of potential tooling required for CNC milling nano-positioner parts.

• Started on creating the documentation for measuring the mechanical accuracy of Stepper V2.

Roadblocks

Problem 1

Coolant tank was not watertight. suspected cause was contamination from inadequate surface prep as well as skill issues with TIG (tungsten inert gas) welding. An attempt was made to braze the locations of leaks but a second leak test was not attempted due to time.

Proposed Solutions

• Grind out areas that have leaks, weld the leak locations again.

• Buy a coolant tank.

Problem 2

Did not finish documentation on test cases due to time overrun with coolant tank task.

Proposed Solution

Carry over task to the next week.

Problem 3

Unsure about who reviews my gitbook updates as well as github project tracker usage.

Proposed Solution

Ask at the next meeting.

Next Steps

Measurement:

• Measure the mechanical accuracy of Stepper V2.

Machining:

• Order tooling.

• Order material.

• Tram the head of the CNC machine.

• PI tune CNC machine spindle motor.

Nano Positioner:

• Create a plan for machining mechanical parts of the nanopositioner.

• Work on CAM (computer aided manufacturing) for one loose tolerance part.

Carry Over Tasks:

• Create and document plan to measure the mechanical accuracy

Update 2 (2/2/2025)

Accomplishments

It is important to note that I am following axis orientation of the Stepper GUI, which is not consistent with industry norms.

Link to testing results spreadsheet: https://docs.google.com/spreadsheets/d/1kp33Uu0bnELoj7gj8I_tnA5ZHgbyOgtRBmU556TN2yw/edit?gid=457045106#gid=457045106

Link to test procedure document:

https://docs.google.com/document/d/1GBycb5NIzfImCTrVROQhtj5_gETUNBXJAFKQSsnJRk8/edit?usp=sharing

• Created a SOP for checking the parallelism of wafers.

  • The highest point and the lowest point were 7 microns apart. This could be due to residue from the cleaving the wafer, manufacturing tolerances, or small amounts of contamination that was not cleaned off through washing with acetone and isopropanol.

  • Did an informal test on contamination. Sharpie marks are around 2.5 micrometers, and finger smudges are measurable under 0.5 micrometer.

• Tested the backlash on the x and y axis of stepper at 10 positions each.

  • The fixes for the X and Y axis by Carson resulted in less that 10 micron backlash.

  • The backlash on the Z axis was so bad that it over-traveled my indicator. (will test it after a proposed fix)

• Tested the step accuracy of the stepper in 10 micron, 5 micron, 2.5 micron, and 1 micron increments.

  • Steps were consistently inconsistent. (see linked spreadsheet)

  • At smaller steps such as 1 micron there would often be no movement even after a command.

• Did initial testing on squareness of axes. Initial testing with a 2 micron indicator and a granite square suggests that x and y axis squareness is not a issue.

• Did initial testing of how parallel the vacuum held wafer was to the axes.

  • I did not bring my course indicators because I assumed the error would be in the micron range. The error was higher than what my indicators could measure.

  • Initial testing suggests that the vacuum is bending the wafer.

• Performed manual PI tuning for CNC machine spindle motor.

Roadblocks

Problem 1

Did not get to test positional repeatability of axes. repeatability of limit inductive sensors, and hysteresis of limit sensors.

Proposed Solutions

Perform test on Tuseday 02/04/2025

Problem 2

Testing by manually typing g-code is slow. Even though most of the time spent was manually adusting the dial indicator there is speedups fr

Proposed Solutions

Create a gcode script if testing is going to be an ongoing thing.

Next Steps

Measurement:

• Test the positional repeatability of axes, limit inductive sensors, and hysteresis of limit sensors.

• Converts notes from testing to repeatable SOPs.

• Test longer travel distance accuracy of axes.

Machining:

• Order tooling. (carry over)

• Order material. (carry over)

• Tram the head of the CNC machine. (carry over)

Nano Positioner:

• Work on CAM for the top plate of open source nanopositioner. Because there are no tolerances in the paper create a dimensioned drawing with best guess tolerances.

• Work on creating a simpler way of testing piezo nano positioning. (Sanity check)

Final Notes/takeaways.

Inaccuracies of small steps (<10 micron) seems to be from motors lacking torque to micro step. friction/binding in the system.

Mechanical accuracy of z axis is so bad that its functionally unusable. (a fix has been proposed and is currently being implemented by Carson )

The axis orientation of the stepper do not follow industry norms. This should be updated to prevent confusion.

even though the surface of the wafer is almost atomically flat. the bottom and top layer are not necessarily parallel.

The 3d vacuum wafer holder is tilted significantly.

Update 3 (2/9/2025)

Accomplishments

Important Notes

The stepper components and axis orientation were changed between the last measurement and the tests performed on 2/8/2025.

• Worked on documentation on test procedures for measuring stepper.

• finished positional repeatability measurements of x and y axis.

• finished repeatability testing of homing switches.

• Attempted CAM (Computer Aided Manufacturing) on open source piezo nano-positioner.

  • There were some DFM (Design for manufacturing) issues that makes the design unnecessarily complicated.

• Worked on a modified design for a single axis nanopositioner, (modified from https://www.sciencedirect.com/science/article/pii/S2468067222000621).

• read papers on friction drive nanopositioning.

• 3d printed the stl of nanopositioner. (printing it feb 10 morning)

Roadblocks

Problem 1

Did not order some tooling and material for nanopositioner.

Proposed Solutions

add items to purchase sheet before tuesday.

Problem 2

The parts specified on nanopositioner have micron level tolerances. Therefore the nano positioner when stacked on top of each other might not be anywhere close volumetrically to nanometer accuracy.

Proposed Solutions

talk to team about it. Should not be a big problem.

Problem 3

Have big due date for major courses. Have to set up things on thursday for design school career fair.

Proposed Solution

Let leads know on tuesday meeting.

Next Steps

Measurements:

• Check with team on proposed positional accuracy of redesigned nano-positioner.

• Check with team on proposed redesign of piezo nano-positioner.

Machining:

• Add spotting drill, drills, taps, chamfer mills,ball endmill, roughing endmill, and collets to purchase sheet.

Nano Positioner:

• Add pre-ground aluminum bar to purchase sheet

• Machine bottom plate part when end mills arrive.

  • Will be a lot of work.

  • Probably going to use sacrificial workholding instead of making custom workholding.

• Add mechanical and electrical part for nanopositioner to purchase sheet.

  • screws

  • linear slide (replace nippon bearing with thk because of availability)

  • connectors and wires

  • ICs

  Update 4 (2/16/2025)

Accomplishments

• Worked on CAD for redesigned nano-positioner

• Worked on test procedures for positional accuracy.

• ran test cuts on scrap aluminum

Roadblocks

Problem 1

Tooling for machining did not arrive.

Proposed Solutions

Machine the week of feb 17

Problem 2

Did not complete CAD for nanopositioner to a suitable state to machine.

Proposed Solutions

Work on cad before presentation date.

Problem 3

NanoPositioner linear rail out of stock

Proposed Solutions

Design around an alternative THK bearing slide.

Next Steps

General

Prepare presentation.

Measurements Finish up documentation for positional repeatability, step accuracy. and backlash measurement testing.

Bought an LVDT probe that "should" be able to measure double digit nanometers across very short distances. If time allows will redo some measurements.

NanoPositioner

should be able to make all the parts for one axis of nanopositioner IF tooling arrives.

After several failed attempts to move Adwoa's Fusion 360 files to ONCAD, I decided to manually attempt to recreate a new peristatic pump inspired by her old design, as well as taking into account the new gearbox motor setup we were utilizing. The main roadblock involving moving the Fusino 360 files was the fact that there was no way to preserve sketches used in the CAD, making it much harder to get a general idea of dimensions and what tools were used to make these components. Furthermore, all of the CAD in Fusino 360 was made in 1 file, making sketches impossible to fully keep track of(since we needed to find a way to seperate them into seperate components, but that would not preserve sketches made in 1 file).

To compensate, I decided to devise a new peristatic pump design utilizing Adwoa's old design, but modifying it to match the new motor setup being used(being a 27:1 gear box attached to the same stepper motor). Although the motor not having enough torque may have been the reason why the pump did not work as intended, I was also willing to bet that the PLA structure was not strong enough either, so I decided to make a more rigid structure, as well as utilizing more infill while printing. Although, a major downside is that the new structure may not be as space efficient as the old one, but considering that it will no longer be part of the gantry, that is not an issue at all. The largest roadblock while CADing, was definitely getting used to ONSHAPE features, since I could not recognize the tools I used to know in Fusion 360. However, the main design of the pump is being preserved, and I plan on utilizing a compact structure, at the cost of utilizing more bolts on the design.

By next week, I plan on begin prototyping the pump, as well as beginning to help Advaith with full assembly of the multipurpose spin coater(since we currently are not 100% sure on whether to move the spin coater itself, or the liquid handling and heating system).

Weekly Update #1

Work done:

I drafted project proposal and set goals/timeline on what we plan to achieve this semester with two other teammates in the EDA device modeling subteam ().

I focused on figuring out what tool to use for the SPICE model simulation. We decided to go with KiCad's schematic tool which has an embedded open-sourced SPICE simulator Ngspice. It supports custom MOSFET SPICE model definition and can export SPICE netlist from schematics.

Roadblocks:

Had some confusion about which tool was the best to use but resolved.

Plan for next week:

Try simulating with the initial MOSFET model with process parameters calculated from last semester's chip. Figure out what parameter is still needed to build a higher precision MOSFET model and coordinate with other teams involved to develop a testing plan.

Weekly Update #2

Work done:

I worked on writing a dummy MOSFET SPICE model and developing an SOP for SPICE simulation in KiCad (). I have figured out how to run DC sweep, plot diagrams, and export SPICE netlist.

Roadblocks:

It is hard to find reliable SPICE documentation. We are having some issues finding the correct way to calculate all the necessary SPICE model parameters from the testing results we currently have. Chips from last semester are not ideal and we are considering fabricating some new chips.

Plan for next week:

Explore more KiCad SPICE functionalities. Research how to calculate parameters, maybe read some textbooks in addition to SPICE documentation.

Weekly Update #3

Work done:

Our group is currently working on developing a test chip for NMOS characterization to collect process parameters and plug them into SPICE model. I worked on designing an initial test chip mask

I also learned how to use the probe station to test the chip when it comes back.

Roadblocks:

Initially, our group thought we could use the chips from last semester to get the curves needed to calculate the device parameters. However, the working chips were missing so we had to design and refabrication our own chip.

Plan for next week:

The hand-drawn chip masks (one for NMOS characterization by me and one for packaging with I/O pads by Gongwei) need to be finalized with appropriate spacing between components and be transferred to real masks by the mask design group.

Weekly Update #4

Work done:

Roadblocks:

Currently do not have any roadblocks, just waiting to circle back on the test chip mask design.

Plan for next week:

Finish up the presentation slides and present on Thursday. Collaborate with Gina and Sandra to convert the hand draft test chip design into actual masks. Plug in numbers Gongwei got from chip 493 into SPICE model to verify if the simulation aligns with experimental results.

Week 1

This week, I dedicated time to writing up the proposal for changes to be made to the spin coater, ensuring that all necessary modifications were clearly outlined to improve its efficiency and functionality. I had planned to coordinate with Anirud on a call to discuss dimensional specifications, but unfortunately, scheduling conflicts prevented the meeting from happening. However, despite this setback, I was able to make progress in other areas by joining the Fusion file and actively working on the prototype for versions 2 and 3. This stage of development is crucial as I refine the design and implement improvements based on previous iterations. Moving forward, I plan to continue prototyping while also rescheduling the call with Anirud to finalize key specifications and ensure that everything is on track.

Week 2

This week, I was focused on material selection and design considerations for the Spin Coater, particularly evaluating options for the transparent lid and non-transparent body. A key part of this process involved comparing thermal resistance, transparency, impact resistance, machinability, and cost for different materials to ensure the chosen components can withstand the operating conditions of the spin coater while maintaining affordability and ease of fabrication.

Additionally, I began research on a linear slide system to improve precision in the spin coating process. The goal is to enable controlled movement of the actual spincoater, allowing it to switch from the liquid handling system to the annealing system. This research involves evaluating different slide mechanisms, materials, and motion control methods to integrate with the spin coater effectively.

Material Selection & Properties Analysis

To ensure the spin coater operates effectively under heat and mechanical stress, I analyzed various polymers based on their deflection temperature, melting point, and durability. This was necessary for choosing materials that will not degrade under repeated exposure to heat and solvents during the spin-coating process.

Polymer Property Comparison

Key Observations:

• ABS and Acetal Copolymer offer high durability and machinability, making them strong candidates for structural components.

• Polycarbonate and Acrylic provide clarity for transparent parts but differ in heat resistance and durability.

• Quartz, though more expensive, offers the highest thermal stability and optical clarity, making it a strong contender for the lid.

Lid Material Selection

Since the lid must be transparent, I evaluated Acrylic, Quartz, and Polycarbonate for their infrared transparency, impact resistance, and heat resistance.

Lid Material Comparison

Final Decision:

• Quartz is the best choice for thermal stability and optical properties, ensuring it can withstand long-term usage without deformation.

• Acrylic is the most affordable but softens at high temperatures, making it a risky choice for prolonged exposure to heat.

• Polycarbonate is more impact-resistant than acrylic but does not handle solvents well, which is a drawback.

I believe that for an initial prototype, acrylic would be best

Non-Transparent Parts: Structural Material Selection

The non-transparent parts of the spin coater need to be rigid, durable, and easy to manufacture. After comparing various options, ABS was selected for the following reasons:

• Cost-Effective – It is inexpensive compared to alternatives.

• 3D Printable – Allows for rapid prototyping and customization.

• Durable and Heat Resistant – Withstands mechanical stress and moderate heat exposure.

Material Procurement

To move forward with testing, I compiled purchase links for the different materials:

Current Research: Linear Slide System for the Spin Coater

To enhance the precision and automation of the spin-coating process, I am investigating a linear slide system. This system will allow controlled movement of the sample stage or dispensing nozzle, ensuring uniform coating thickness and reproducibility.

Key Design Considerations for the Linear Slide System

1. Motion Mechanism

• Linear Rails with Bearings → Provide smooth, low-friction movement.

• Lead Screw System → Ensures precise motion but is slower.

• Belt-Driven System → Faster but less precise.

2. Actuation & Control Options

• Stepper Motor Control → Allows programmable movement and precision control.

• Servo Motor Control → High precision, but more complex and expensive.

3. Integration with the Spin Coater

• The system must be rigid enough to prevent vibrations.

• Motion must be precise yet smooth to avoid uneven coating.

Next Steps in Slide System Development:

• Test off-the-shelf linear rail systems to compare smoothness and precision.

• Design a mounting system to attach the slide to the spin coater frame.

• Evaluate stepper motor vs. manual control for better precision.

Conclusion & Next Steps

This week’s work has brought significant progress in:

• Material selection for both transparent (lid) and structural (non-transparent) components of the spin coater.

• Comparing key properties like heat resistance, impact strength, and machinability to optimize design choices.

• Beginning research into a linear slide system to improve precision in the coating process.

Week 3

This week, I made significant progress on the CAD design for the automated spin coater system. A major focus was refining the structural framework, ensuring that it is both rigid and modular. The design utilizes aluminum extrusions, which provide a strong yet lightweight foundation while allowing for easy adjustments and scalability.

One of the key developments this week was the integration of a linear rail system at the base of the structure. This rail serves as the foundation for the horizontal motion of the spin coater platform. To achieve this, I designed a custom carriage system that allows the spin coater to move smoothly along the rail with minimal friction, ensuring the liquid on it isn’t affected by the motion. The carriage is designed to accommodate precise linear motion, which is essential for avoiding uneven coating application.

Additionally, I incorporated an infrared distance sensor into the design. This sensor will play a crucial role in detecting and monitoring the position of the spin coater platform, ensuring precise control over its movements. By providing real-time feedback, the sensor will help maintain consistency in the coating process, an essential factor for achieving reproducible results. The placement of the sensor was carefully chosen to maximize accuracy while minimizing interference from other components.

Beyond the core structural and motion system, I also worked on establishing a system for the CAD, including redesigning the 80/20 rail to be a bit simpler and work better in Onshape assemblies. While small, these changes make it monumentally easier for the team to design, and provide a standard that can be used in the future.

Moving forwards, my tasks will include designing the belting system used to drive the linear slides, as well as helping to design the element going on top of the cage, including the liquid handling system and the heat gun. Once these are accomplished, I have to test the spin-coater on the linear slides to determine what acceleration/ ramp-up is required to avoid messing up the liquid on the ASC.

Week 4

This week, I focused primarily on the project presentation for Tuesday. However, I also tested the IR sensor using an Arduino. This involved setting up the hardware on a breadbaord, writing the necessary Arduino code, and debugging any issues that arose during the process. A few issues arose with random jumps appearing the return values, but I discovered that this was due to a bad soldering connection. Next week, I should have all the parts necessary to begin building a first prototype of the linear slide mechanism, which I can also test with the new infrared.

Update 0

Update 1:

I have taken the measurements of the build plate and started CAD for the cable fixture. Unfortunately I can't figure out how to attach it here but it is waterjetted aluminum. I will in the coming week look for stock in TechSpark and fabricate it.

Update 2:

Not part of my core work but will be helpful in the future: I have made CAD of the chamber. I will post the drawings in the Discord, unless there's a better place to put them.

I was planning to waterjet the fixture for the cathode cable, but I didn't see any stock of a good size in Techspark; may end up ordering them. The other part of the shielding I'm fairly certain can be done with just a bunch of teflon and more RG400 cable. (The fixture will clamp on to the cable.)

So to get started I need some thin aluminum sheets, a couple thin nuts and bolts (I can adjust the holes to match whatever's available), some more RG400 and a bunch of teflon sheets; I suspect most of these we already have at the build meeting on Monday I'll look for these. That being said, all of these are pretty basic, I even saw a significant length of RG400 for <$6 () so just buying would be OK to.

Just a quick note, I've been finding it a little annoying to trawl through the documentation to find the relevant info; the documents are rather long and often I scroll so long I forget what I'm looking for. This was part of the motivation for making the CAD. (I just kept measuring stuff on the chamber.)

Goals for this week are to order the materials and waterjet, I think it'll be possible to get this shielding issue done around Saturday, but we'll see.

Update 1 feedback:

Thanks for the update. For the future, it would be great if you can add some more detail in what progress you have made as well as list specific tasks you plan on working on in the next week so we can ensure we are staying on track. Please also include if you have any setbacks (or mention that there are none) in your updates.

For any CADs or diagrams, it's fine if you just include a screenshot or link to a drive or something just so we can see what you're working on. Thanks

Update 3:

In general, I'm making some pivots. We'll be making minor upgrades to the sputter chamber version 1, but the more important task is designing and building version 2.

For the minor upgrades to the V1 chamber, we're ordering some new components. This includes a new feedthrough (using a double-ended MHV connector), a new RG400 cable, and a ring of aluminum to surround the cathode (for better shielding). However, these were made less important due to some modifications made by Jay, such as adding viton spacers around the cathode, as those reduced the excess plasma formation. (We probably will still implement the upgrades this coming week.)

I am approximately ~85% on CAD for chamber version 2; I should be done by around Tuesday and will ask others on the sputtering team for feedback. This is important to hit so that we can order components for V2. I'm hoping to already start ordering some components for V2 as early as tomorrow. Besides this, the big goal for this week is to implement the V1 upgrades.

Also, please let me know if I'm doing these wrong.

Update 4:

Seemingly exactly what we're looking for can be found at https://jskindustrial.com/product/diameter-transparent-glass-cylinder-tube-high-quality-quartz-tube-orifice-type/; they go up to 400 mm diameter. Plus they're made in INDIA, which will make my grandparents happy. However, I couldn't figure out how to order from them?

I also found a company called Greatglas Pyrex Cylinders; I called them and they said they can do 300 mm, 250 mm, and some lower diameters and would cut to the length we ask for. We can place an order at greatglas@greatglas.com; on th one hand they were very helpful but on the other hand they said an estimate of like $1000 or something very big like that with a 3-4 week lead time.

Other than that, based on Professor Matt's recommendation I found some really strong magnets for the magnetron, as a matter of fact we should be careful when we get them so as to not accidentally crush any fingers.

There's also some other parts that are perfect for our purposes such as the ring clamp.

However, I did see Jay made some purchases; I will have to ask for some clarification regarding these.

I am a bit worried about timeline; on the purchase tracker the V1 upgrades have been marked as purchased but not arrived. I am currently feeling a bit under the weather so if this worsens then I might not be able to get the necessary work done on time.

I will have to update this based on Jay's purchases.

p.s. I may just be blind, but I think this is the first time I'm being able to see the feedback you all left?

Feedback:

Thanks for the update! I know we've made a lot of changes to our chamber subgroup's plan for the rest of the semester, so some shifts have been made to make sure we are on track to complete v2 by the end of this semester. For the updates, please do mention if you have encountered any setbacks (or mention if there are none), and include any diagrams or CAD (a screenshot is fine), even if it's incomplete/imperfect, so we can see your progress. Also, please remember to update any progress on our devlog (masterdoc) and github progress tracker!

ALD Project Proposal:

Packaging Project Proposal:

Weekly Update #4:

ALD:

Progress:

• Grinded out design for delivery storage, some major design elements and specs:

  • Previously unused 1/2" section removed to prevent precursor mixing

  • Box made of 4 piece 1.6mm thick bent sheet metal

    • Bolted together with M3 screws

  • Manifold supported by ALD valve collar with 3/8"-16 U bolts mounted to box ceiling

  • Single hinge and latch using #6 screws

  • Mounts to 8020 stand with M5 screws

  • Cutouts for:

    • Inlet and outlet for carrier gas and precursors

      • 1/4" steel tubes wrapped with heat tape

    • 3 sets of heat tape and thermocouple

      • 1 for manifold and outlet line

      • 2 for TMIn and TDMSn ampules

    • ALD Valves power and control wires

    • ALD Valve N2 supply

    • Exhaust for KF40 bulkhead flange

    • Vent holes on 2 sides for exhaust airflow

• Submitted safety review of earlier prototype to Matt

• BOM:

Struggles:

• balancing time with school work to get design finished

• we planned to order last Friday but wasn't able to get that ready in time

To do for this week:

• Confirm inlet and outlet configuration

• Make any final adjustments to sheet metal

• Finalize BOM and order everything before Tuesday

  • still need to set up a Send Cut Send Quote

• Work on presentation

Packaging

Progress:

• Informed Icey about the recommended 3 micron AL pad thickness from this article
• Also got registered to work in MEMS lab

• Joel and I have been thinking that jumping to chip on PCB packaging will be much eaiser to implement bc we can reduce the complexity and number of process steps in packaging manufacturing

• we should be able to cover up the chip with lower risk of contamination by 3D printing a cap that is much larger than the chip itself and screw mount to through holes on the board

• I don't think this will change anything on EDA's side but ran it by Icey to check

Struggles:

• making enough time for packaging due to time spent on school work and trying to make ALD deadlines

To do this week:

• work on presentation

• should be able to start PCB design once we get the thumbs up from Icey and EDA team

  • need to get footprint of analyzer connector

  • create footprint for wire bond pad pattern

  • consider things like decaps for the board...?

• hoping to mill the board this weekend and be ready for resistor lab chip to be made

Weekly Update #3:

ALD:

• Ordering for sealing unused section:

• Planned out rough cutout locations for delivery storage

• Created rough CAD for delivery storage

  • Have a rough concept for fixturing the manifold by holding onto the unused section

• Had a rough week with school work so challenge has been to get good progress on CAD :(

• Planning to get the design to have finalized dimensions and complete for manufacturing this week

  • Need to add concept for holding the bottom of ampules as well

    • will have to think a lot about how tool access will be like given limited space

  • Really hoping to make the Friday ordering deadline for SendCutSend

  • Also need to double check dimensions of hardware and communicate with Viswesh to make sure that routing will be successful

Packaging:

• Worked with Icey and EDA team on plans for first package:

  • Will design and build a 16 pin DIP package for 2 major uses:

    • Wire bond resistance testing

    • MOSFET testing

• Wire bond test:

  • Basically a similar setup to resistor lab, except the N channel conduction path width is being varied in order to keep wire bond pad locations roughly similar

  • Will consist of multiple patterns on the chip for both yield issues and for testing different pad sizes for performance

    • Gave them at least 200um x 200um pads and 300-500um spacing

    • the package for resistance testing will be open top so we can wire bond to different patterns with varying pad sizes by snipping and rebonding after each CV test

• MOSFET Testing:

  • will have 5 NMOS requireing 15 I/O and 1 GND

  • still in the planning and design stage but can use the same package as resistance testing

• Meeting notes:

  • collaborations between Metrology and EDA group:

    1. (Gina Seo and Sandra You) DRC provides Resistor lab pattern but with pads added on at the peripheral ( pad size > 200umx200um and 300um-500um spacing between pads)

    2. (Gongwei Wang) I/O information (numbers and types of pad for future circuit design, atm: 3 terminal MOSFET 16(5mosx3pads+1gnd) ),

    3. (James Lin) provides some footprints info, and a sketch of pad locations. Research on different IO pad structures.

• Things to do this week:

  • give EDA pad thickness to design for
  • Come up with a lead frame and encapsulation design

• Things I am struggling with:

  • having enough time to focus on this since am behind on ALD

  • also the ebay lead frame got rejected but it should be ok cuz we have to make our own anyways

Weekly Update #2

ALD:

• Confirmed that current heating tape can be used and need programmable AC power supplies after some research

• For CAD:

  • Made a table spaceclaim based on measurements in the lab to help the ALD team plan positioning and pipe routing
  • Created a rough model of the ALD manifold to reference for mounting ideas
  • Talked with Viswesh about possible concepts for supporting the ampules

  • Also considering just switching to AL sheet metal that is a bit thicker than what we have to do away with floppiness concerns - don't anticipate a huge increase in cost

• Currently trying to get CAD ready as soon as possible but currently a bit short on time to head down to lab frequently

• Over the next week I will be trying to get models of ampules and ALD valves in CAD so I can begin work on the enclosure and support structures

• Also need to get the heat tapes out and figure out how exactly we will wrap the manifold

Packaging:

• Currently in process of getting MEMS lab access and took a bit of time to know how to use the wire bonder with Joel

• Ordered some sample leadframes and PCB SMD breakout module
• Tentative decision is PCB mill for lead frame and resin 3D printing for encapsulation

• Confirmed that Ideate offers resin 3D printing and curing for students

• Had a meeting with Icey to discuss plans for working with packaging:

  1. @Gina Seo @Sandra You | EDA DRC provides Resistor lab pattern but with pads added on at the peripheral ( pad size > 200umx200um and 300um-500um spacing between pads)

  2. @Gongwei Wang I/O information (numbers and types of pad for future circuit design, atm: 3 terminal MOSFET 16(5mosx3pads+1gnd) ),

  3. @James Lin [ALD] [Packaging] provides some footprints info, and a sketch of pad locations. Research on different IO pad structures.

• Also got info from Jay that we may need packages for 2 terminal devices

• Going forward I will be looking into possible packages to reference for the resistor lab pattern and 5 MOS pattern and start thinking about how best to distribute pad locations

Weekly Update #1

ALD:

• Got my project proposal for precursor delivery system finished and received feedback on it. Will be waiting on revision from my lead later this week.

• Over the upcoming week I will focus on getting the remaining components for delivery system ordered (KF25 tube fitting, 2 stage regulator, heating tape). Hopefully by Tuesday. I will also find time to figure out the physical design space for the ALD system in our lab in so I can make a general space claim in CAD.

• I'm currently trying to figure out uncertainties with requirements for heating tape and what option would be best for our controls team to interface with. I've added some links in the master doc from this preliminary research.

Packaging:

• Got my project proposal for IC packaging finished and received feedback on it. Will be waiting on revision from my lead later this week.

• I will be working with Joel to get familiarity with the wire bonder in the upcoming week. I will also start picking a suitable package for the planned 1cm x 1cm chip size,

• Currently I'm trying to narrow down manufacturing methods for the lead frame and encapsulation

  • Lead frame:

    • TechSpark has confirmed that we cannot use their laser cutter for copper,

    • Joel said that he has seen people using the CNC mill for this, so I will be waiting on details regarding that.

  • Encapsulation:

    • 3D printing seems like an attractive option due to high resolution and low complexity.

    • Joel said that we can set up the resin printer in his office.

    • I also know that IDEATE does resin printing but need to go down there to confirm availability for non IDEATE students.

    • Still a bit concerned about whether 3dp material can withstand soldering, but there might be workarounds like using sockets

Weekly Update #0

ALD:

• I went through the primer and documentation to understand the basics of the project. I selected the delivery system as my main project for the semester. Current struggle is going to be tracking down CAD that was previously done for the project. I plan to read more into the specific design requirements for the delivery system and look through the CAD to understand what models of existing parts I will need to source/create.

Packaging:

• We started with a rough idea to build our own wirebonder, but after the meeting with Icey from the CMOS team, we decided that using the exisiting one in the MEMs lab is sufficient for this semester. So instead I will be working more on a solution to package our silicon chips for this semester. After talking to Joe, we decided to start by purchasing lead frames for testing and we are having trouble finding a complete DIP package that we can buy online.

• Link to DIP lead frame on ebay: https://www.ebay.com/itm/256227046773

• Some notes from Friday's meeting with Icey:

  • pads will be done with thermal evaporator - has AL capacity

  • we should watch out for resistance at connection

  • at MEMs lab pads are 200umx200um (larger is reccomended), need at least 300um-500um ish between each pad

  • our chips are currently 1cmx1cm

  • bond wires can extend to a few cm long

• Going forward I will look into different options for packaging (pads on PCB or attempt to replicate DIP package from industry) I will also start to explore manufacturing methods and some design requirements for our IC package.

Update 1

Accomplishments

• Completed the project proposal and went over it with the TAs

• Set up the reflux apparatus in the acid fume hood (SOG)

• Decided to start with replicating the ProjectsInFlight formulation with later tests of catalysts, altering the ratios of ethanol, phosphoric acid, and boric acid (SOG)

• Learned in greater detail the systems involved with the ALD controls (ALD)

Challenges

• Still having trouble downloading LabVIEW onto my computer

• Will probably need assistance from Viswesh

Future Plans

• Solidify the plans for SOG and get more acclimated to the lab overall

• Do more research on the chemicals involved, narrowing down the many possibilities of failure (especially the boric acid)

• Download LabVIEW and start learning how to use the system

• Gain access to the LabVIEW for the ALD

Update 2 (SOG)

Accomplishments

• Ordered 95% ethanol that is needed to replicate the ProjectsInFlight formula

• To start testing, decided to use isopropyl alcohol as an ethanol replacement

• Looked into the Filmtronics ingredient list for 700B and found it possible to test ratios in the future

Challenges

• Realized we did not order ethanol, which is a key ingredient in the ProjectsInFlight video, so I have to wait until that comes in

• Already resolved with Jay and Daniel

Future Plans

• Start testing the formulation of the n-doped spin-on glass using TEOS or TMOS, water, isopropyl alcohol, and phosphoric acid (ratios based on the video)

• Might not work due to the less polar nature of IPA than ethanol and therefore not provide the emulsification that is needed for the water and TEOS/TMOS

Update 2 (ALD)

Accomplishments

• Got more adapted to LabVIEW and was introduced to the ALD valve and heating element control systems on my computer

• Used a YouTube video to try and connect the MC DAQ to LabVIEW directly

Challenges

• Couldn't directly download the LabVIEW file from the GitHub due to the different version that is available for Mac versus Windows

• Resolved with Viswesh

Future Plans

• Continue to try and connect the MCC DAQ to LabVIEW

• If that does not work, make Python code that will alternatively do the job

Update 3 (SOG)

Accomplishments

• Tested the ProjectsInFlight recipe with the exclusion of ethanol in place of IPA.

Challenges

• After the heating, there was a residue inside the flask even after thoroughly washing (assuming it is glass).

• The solution did not evaporate into the reflux apparatus and condensate back in to the flask at all (only condensate within the flask).

• Our dopant on a chip was visibly darker in complexion in comparison to the commercial dopant on a chip.

• More striations were present in the DIY SOG (not as smooth and might be due to the replacment of ethanol with IPA).

Future Plans

• In the video, there is somewhat direct heat contact between the flask and the hot plate without the use of a water bath, so higher contact temperature with the flask for a shorter amount of time should be tested with the same recipe from 2/5/25.

• Research a type of silicate polymer that is compatible with the other ingredients shown below, and add that, along with reagent alcohol, to the purchase tracker.

• Vary the amount of 85% phosphoric acid by adding and subtracting 0.25 mL from the original 0.5 mL.

Update 3 (ALD)

Accomplishments

• Instead of using the MCC DAQ to control the heating elements, relay hats and thermocouple breakouts will be connected to a Raspberry Pi 4 and the heating elements.

• • DirectVac software only runs on windows

  • Open and close fully or open incrementally by 1º

  • Any device capable of running a USB host and can communicate serial commands can precisely operate the CommandValve

Challenges

• InstaCal and ULx only run on Windows, so I could not check it myself, but also later found out that LabVIEW is not compatible with the MCC DAQ, so we needed to find a new way.

• Decided to scratch the use of a MCC DAQ as a whole.

Future Plans

• Look into how to run both ALD valves and the PID temperature LabVIEWs simultaneously once LabVIEW is downloaded onto the mini PC

• Find the python block on LabVIEW and see if the python script runs on LabVIEW

• Make python code that cycles through the thermocouples and averages the temperatures outputted, sending only one averaged value to LabVIEW

• Need to transfer the temperature readings from the Pi 4 to a mini pc that is running LabVIEW (Pi 4 is quite slow).

• Learn more about the adafruit library and code to accomplish the main task.

Update 4 (SOG)

Accomplishments

• Tested the ProjectsInFlight recipe with the exclusion of ethanol in place of IPA.
• Direct heat of 175ºC for 30 minutes on 2/13/25.

• Direct heat of 100ºC for 15 minutes on 2/14/25.

• Diffused the first sample made on 2/5/25.

Roadblocks

• No stir bar was used on 2/13/25 and might have been the reason for excessive residue at the bottom of the flask (need to order).

• There was a good amount of residue at the bottom of the flask that turned into a crystal-like powder after being left out in the flask for one day.

  • The silica solid residue collapsed due to the dehydration of the solvent since it was left out (DI water and IPA).

• Still not reaching the reflux apparatus (might be too little liquid for the size of the flask and the reflux apparatus).

  • This shouldn't be an issue since there is condensation visible within the flask.

• The leftover solution from the first sample (2/5/25) solidified into a gel consistency after a week in its container.

  • The SOG is not sustainable and has a short shelf life, which might be due to the speed of the reaction.

Future Plans

• Continue to test the temperature and time

  • Direct heat of 100ºC for 25 minutes.

• Since I could not get to it last week, vary the amount of 85% phosphoric acid by adding and subtracting 0.25 mL from the original 0.5 mL.

  • Increasing the phosphoric acid increases viscosity, and decreasing is okay as long as the pH is within the range that minimizes the reaction speed or else the shelf life of the dopant will tank (pH of 3-4)

• HF etch the previous chips and test the conductivity using the probe station.

  • Look into how you know the dopant is successful and the range of all the components.

• Grasp a better understanding of why the results are turning out the way they did, especially the test from 2/13/25

Update 4 (ALD)

Accomplishments

• Found the python node on LabView.

  • Functions palette, connectivity, python.

• Instead of working and testing the python code all at once, I focused on writing the code to average the temperatures read from one thermocouple on the Raspberry Pi.
• Able to run multiple VIs through a primary VI by calling multiple subVIs through the primary VIs:

Roadblocks

• Could not run the python script on LabView since it is incomplete.

  • With the absence of a mini PC, would it be reasonable to figure out how to run the script through the PI instead of from the mini PC?

• Had difficulty analyzing whether the code was averaging different temperatures due to the fact that the same number was repeatedly being outputted

  • Would it be possible to check with a wider range of temperatures to see if the output changes in that case?

Future Plans

• Confirm whether my python script is averaging the temperatures correctly.

  • Could attempt to make a list of random values to average, importing the random library to do so.

• With the use of serial ports, run the python script on more than one thermocouple breakout.

• Work on the section of the main function code where the data will be sent.

Hey, I'm Sky! I'm going to be working on the Litho Stepper team this semester.

Weekly Update 1

1. This week I had many discussions with Joel, Kent, and Carson about my project for this semester, and what we settled on was pretty much "build a Stepper V2.1", with the goal of reusing most of the approach and design of Stepper V2, but reducing cost and hopefully improving results. My proposal is here (with the changes we discussed in class at the top):

2. The main roadblock for me is time management: I'm juggling several project courses currently so hopefully I can get into the swing of things this coming week, now that eCTF's workload is starting to even out.

3. Next week I plan to formally take the ideas discussed after presenting my proposal to the team and make a concrete task list: one of those tasks will be working with Joel to order parts, which I also plan to do this coming week.

Weekly Update 2

1. This week, after talking with the professors and TAs on Tuesday, I've refined my project goals significantly. I'm still going to be building "Stepper V2.1", but now with the focus on "overall improvement", specifically in regards to how the actual stepper is assembled, while keeping the overall cost around the same. My 3 core goals with this are:

   1. rigidly mount all of the components on a frame rather than have them sit on a base plate: this will improve focus performance by ensuring the focus planes are parallel and also reduce vibrations by having the components rigidly coupled

   2. mount the optics vertically: this requires the former and allows us to make use of Carson's motion stage improvements (major increase in positional accuracy)

   3. make the exact model of projector not an integral part of the design: this could allow using cheaper EVMs and potentially even consumer projectors like in Stepper V1, and more importantly gives us recourse in case the DLPDLCR471TPEVM is discontinued.

   My main actual work this week was toward this last goal, where I disassembled our DLPDLCR3310EVM in order to measure the lens mount, so it can be adapted to our optics. This projector model is end-of-life unfortunately but by making sure that it can be used in addition to the much larger DLPDLCR471TPEVM will help for my 3rd goal. My notes on the disassembly process were added to the under Feb 1, and here's my notes on the actual lens mount:

2. No current roadblocks, but a looming one that might be an issue is the fact that several of the DLP EVM modules including the DLPDLCR471TPEVM that Stepper V2 requires are very low stock. Not sold out, but still concerning.

3. I'm going to talk to Joel over the next few days about ordering parts, and then start digging into the CAD for the frame. I have a few possible paths for the design that I've been considering:

   1. Like Stepper V1, with the projector at the side and the camera on top. V1 had the issue of this cantilevering causing bad vibration, but I think this can be avoided by rigidly mounting the optics on both sides.

   2. Like Stepper V2, but rotated 90° so that the projector is on top. This avoids the cantilevering entirely but at the expense of being top-heavy. I think this one also might be better for adapting different projectors, since the projector can be supported from the lens side.

   I'm going to create an initial design using the second option, but keep the first one in mind. I'm going to initially target making the frame out of laser-cut acrylic, and if that turns out to not be rigid enough then I could try aluminum. I know that acrylic can be super rigid if done right with ribbing though, so I'm hopeful that would work.