• get pure aluminum

• mixed with SI

• need thermal evaporator

Simplified View of Process

See Fabublox for Interactive View

Alternatively: See Google Sheets for Comprehensive Example with all Parameter Values (Chip 336 Shown Below)

Introduction

The Lithography Spinner V1 plans to use the Blu-Ray disc assembly from a Play Station 5 (KEM-497AAA) to drive the whole system. They are readily available and can be found for $30-$70 in most places.

Typically a single IC is used to drive these modules but most vendors wont sell chips to individuals. So the plan is to design a discrete controller board to manage all the HW and write our own controller SW.

• etch rate

• selectivity

• uniformity

• anisotropy

• effect on photoresist?

For a description of what the team at CMU is working on in Spring 2025, check out this document!

TBD

• uniformity

• deposition rate

• deposition precision (between runs)

Link to General Lab Equipment BOM

BOM of each machine is included in separate build documents.

Want to work on something? Plan a task add your name next to it!

🏃‍♀️We like making hardware, fast 🏃‍♂️

The Way we Source Parts

Organized List of Sellers

To do, for now search our

Introduction

This is the project page for a lithography system based on repurposing Blu-Ray drives. The initial goal is to reach a feature size of at least 500nm (2x the Blu-ray laser spot size). As a stretch goal, we would like to also use the sled and spindle motors as high speed nano-positioners and to spin coat and cure photo-resin.

Safety

✓ Safety goggles/glasses are absolutely necessary. A laser dot contains a large amount of energy in such a small space, in the form of light. Your eyes are extremely sensitive to light, and a direct exposure to this very dense energy light for less than a second will blind you for life. We can prevent this by wearing a special type of light filtering glasses, somewhat like the way sunglasses work. But, sunglasses will not work as laser safety glasses. These glasses need to be coated for the correct wavelength. Do not purchase any laser safety glasses under $30, buy from an authorized and reputable seller such as survival lasers. $5 lenses from China will not be sufficient, and have been proven unsafe.

Currently Recommended: ✓ Be fully aware of what you are pointing at. With a massive amount of light comes the heat as well. Lasers higher than Class IV (>500mW) burn certain objects very easily, lower powers do burn as well but not as intensely. Lasers like this can most definitely burn furniture such as carpet and couches, hardwood floors, curtains, walls etc. You need to make sure that you are not burning anything against your desire. If the heat build up in an object from a laser is sufficient enough, the object could be set on fire. ✓ Keep in mind of any dangerous objects/surfaces. Look out for anything noticeably reflective/smooth such as a mirror, polished metal, or even something smooth like a desk. The last thing you want is a laser beam reflected back at you into your eye. Even with safety goggles/glasses, you should not take a chance. Something else dangerous that you need to look out for are flammable items, a high powered laser can easily ignite a match or alcohol. CAREFUL WITH WINDOWS - None are 100% transparent, and WILL reflect a solid beam back towards you, this goes for any type of glass at all. All reflected beams are also a danger and this is no exception. Windows are also a bad thing to be pointing a laser through, you don't know exactly where/what you'll hit. __________________________________________________ Be careful with lasers, treat them like a loaded gun. It is very easy to create dangerous situations with a laser if you're not careful, be responsible and eliminate that possibility!

Source: laserpointerforums.com

Project Status

Right now, the first project for this technology (Lithography Spinner V1) is in the research/idea stage. See work in progress page for details on upcoming tasks if you want to contribute.

Project Specification

Datasheets

Datasheets Used in the OPU Driver PCB

ECP5 Files

Power Supply

Introduction

The HW needed to drive the OPU can be broken into 3 sections:

1. Motors

2. PMIC

3. Laser Diode

Preliminary PCB

OPU_Driver_rev0p1 PCB CAD capture has been completed and is up for review on github here:

The board has been roughly quoted on JLCPCB:

• PCB= ~$35.00 / Ea

• Components = ~ $110.00 / Ea

3x Assembled PCBs = $550

At this time no orders are planned until firmware is far enough along to confirm pin out and FPGA logic size.

Introduction

In order to develop the SW for Texas Instruments TPIC2050 and test a good bit of the system, the BU40N blu-ray module was chosen for early development. Although available online, this module may not be available for long which is what disqualifies it from general use. Removing the MT1950 chip allows access to a lot of the pins of interest. Powering it is also relatively simple as it should only need 5V.

List of improvements over

1. Only requires a 3D printer (no machining)

2. Only requires vacuum pump 1/5th the size

3. 1/2 the height

4. Easier to assemble

5. More reliable excess liquid collection

   1. Easier cleaning

   2. Less motor stalling from dried residue

   3. Less residue on window for better visibility

6. Better user interface

   1. Replace touchscreen with potentiometers

   2. Put power button on top so entire operation with 1 hand is possible

   3. Top swinging window becomes flush with side wall and snaps into place

Here is a of our most recent spin coater V1 build. More info to come soon!

• Collect all necessary measurements of the current spin-coater to create the new 3D mode.

• Finalize an updated 3D model that includes the servo mount and any necessary adjustments to the lid design.

• Order required components, including a servo motor, necessary mounting brackets, and plastic material for a redesigned lid.

• Cut and prepare the new lid, ensuring proper fit and clearance for rotation

• Assemble all components and build the initial prototype.

• Conduct preliminary functionality tests, focusing on servo movement and integration with the claw mechanism.

• Optimize servo rotation angles and positioning to maximize clearance while minimizing occupied space.

• Conduct final system tests to verify smooth automation and reliable lid operation.

• Implement necessary refinements and finalize the design for long-term use.

Working Docs

Links to work in progress notes from individual contributors - add your link here with a pull request

Shared, more concise notes live here on Gitbook. See

• high level: we can relate all the process parameters to electrical characteristics

• all the tests we can do

  • what they tell us, how many probes needed, etc.

  • example pictures, resulting curves

• lots of great diagrams from Anirud, Icey, Ahmet, Joel working docs we can update with

Semiconductor Parameter Analyzer

Not all transistors are created equal. There is an immense amount of information within the electrical characteristics of the device that helps with optimizing the manufacturing process (Read Peter Van Zant Chapter 14). Below is an example of an ideal IV curve from a textbook, and the first IV curves taken in the Hacker Fab. While our curves aren’t perfect, they do exhibit transistor-like-characteristics 🙂.

IV curves are not the only tests that can be done with a parameter analyzer. With enough data, trends in these different curves can be directly associated with process parameters.

Probe stations are traditionally heavy desktop machines that hold probe manipulators. The purpose of the probe station itself is to precisely move the tungsten probe in order to make contact with the contacts of the device. This typically means moving 3 individual probes to the gate, source, and drain contacts, and another to contact bulk.

Probe Station + simple diagram of contact locations

These probes are attached to the back of the Semiconductor Parameter Analyzer - precision instruments consisting of multiple SMUs (Source Measure Units) and a built-in computer to control them and store readings. Source Measure Units are glorified power supplies with built-in voltmeters and ammeters - they are very precise instruments that are able to supply voltage or current through the probes, and simultaneously read voltage or current.

This page documents the current work being done on patterning systems and the goals of that work. If you want to start a new project or research related to patterning, add it here so we can keep track of what's being done!

Backlash Improvements

The current design for stepper v2 involves having the micrometer-motor couplers slide along the shaft of the motor. This leads to wear in the 3D print and prevents the use of a rigid connection, leading to the coupler eventually becoming loose. This can cause ~30º of backlash in the rotation, which corresponds to about 15 microns.

Mounting the motors on the stage that they move, rather than on a (relatively) fixed stage allows for using a rigid coupling without significant modification to other parts of the design. These fixes should be applicable to any fab with an existing v2 stage. This is a major enabler for Absolute Positioning.

This may require redesigning the stage to be mounted upright, or the stage to be turned sideways.

The WIP CAD files are available on Onshape and more information can be found on Discord.

Absolute Positioning

In order to enable many features like automated or computer-assisted patterning, it must be possible to consistently refer to positions on a die. This requires being able to determine the absolute position of the stage.

There has been some experimentation with using inductive sensors for determining the stage position, though calibrating and mounting the sensors is difficult. The accuracy for a properly calibrated and mounted sensor may be sufficient, though. (TODO: Link inductive sensor notes once those get merged)

Currently, a design using simple limit switches is being developed (though blocked on Backlash Improvements).

Cost Reductions

The current optics system is not physically capable of handling the projector's resolution, i.e. some amount of detail is wasted in the optics system. This means that we can use a lower resolution (read: cheaper) projector.

There are two main items that we are looking at replacing to reduce our cost. The first is the projector itself, as we are using an expensive 4K projector that does not appear to yield much benefit in patterning resolution. We are considering going from the DLPDLCR471TPEVM ($999) to the DLPDLCR230NPEVM ($299).

The second item that we are looking at is our camera. We are currently using a high-resolution FLIR camera ($700) which, again, is excessive for our application. We believe that we can find a similar C-mount camera for less than $200.

Lastly, there are other components in the optics system itself that we believe can be modified/replaced to further reduce the cost. The ThorLabs components cost at least $700, but many of those parts such as tubes and flanges could be replaced by 3D-printed parts. We will have to test to see if heat generated by the stepper becomes an issue, but this would provide a significant reduction in cost.

Altogether, we believe that we can bring the cost of the stepper below $2000 - perhaps even $1500.

Dope the channel, and source/drain regions for CMOS chips, via solid source surface diffusion, starting with 5-10 ohm p-type substrate.

Metrics

Working Folder in Google Drive: https://drive.google.com/drive/folders/1bnJyeBcbssFuE7fQBo4J-6Roz3mHzRwJ

Goals

Develop metal contact formation process (pre, during, and post deposition development) to reduce the contact resistance and Schottky behavior of of metal contacts on Source/Drain regions of PMOS and NMOS devices. Metal type in metal - Si contact is part of optimization.

Metrics

Working folder in google drive: https://drive.google.com/drive/folders/1qafBxH8luKwNSnPRmJxCRI_14apNio72

What is Lab Auto?

Lab Auto's goal is to automate the steps of the NMOS process for Hacker Fab. This will take the form of a lab robot with integrated machines for each step of the process. Currently, we're focusing on an automated spin coater that will receive a blank chip and spin on HMDS and photoresist, with liquid dispensing and baking capabilities.

Specs

Our Subprojects

Purpose

To apply a thin layer of wet chemicals to the surface of the chip, with sub-micron control.

Troubleshooting and Best Practices

Procedure

1. Plug in the Spin coater and the vacuum pump (if either is not able to power on try hitting “reset” on the outlet)

2. Use the arrows on the touch screen to set the spin time and rpm

3. Use tweezers to place wafer onto the o-ring so that the chip completely covers the o-ring and will seal onto it

   1. Also attempt to center the chip on the o-ring as best you can. This will minimize the chances of it flying off.

4. Use a pipette to apply liquid on top of the wafer while it is seated in the spin coater. You only need a couple drops in the pipette, don't suck up extra.

5. Close the HMDS/photoresist/SOG lid.

6. Close the spin coater lid

7. SWITCH ON THE VACUUM PUMP!

8. Press “begin”

   1. This will begin a pre spin at 600 rpm

9. Press “coat”

10. When the spin time has been reached, the coater will automatically ramp down to rest

11. Open the lid and remove the wafer with tweezers

Side Notes

If you hear the spin coater constantly beeping, this is normal. It does this because we are using a drone motor ESC, so it is programmed to make a noise after being at rest for a few minutes. It’s trying to help you find it 🙂

Feel free to turn it off using the switch in the front so the noise goes away.

Purpose

Soft baking photoresist and annealing spin on glass.

Troubleshooting and Best Practices

Procedure

Heating

1. Plug in the hot plate, it should beep, light up the screen, then go dark.

2. Switch the hot plate on, it should light up and display both current temperature, and a pending set temperature.

3. Turn the knob until the desired set temperature is present, hold the knob down until it beeps to set the desired temperature.

   1. A small green circle should appear at the set temperature

4. The screen should alternate between set temperature and current temperature, ensuring that the current temperature is increasing.

Increasing Set Temperature While Operating

1. Hold the knob down until the set temperature is canceled.

   1. The small green circle should turn off.

2. Turn the knob to your new desired temperature, hold the knob down until it beeps to set the desired temperature.

   1. A small green circle should appear at the set temperature

3. The screen should alternate between set temperature and current temperature, ensuring that the current temperature is increasing.

Shut Down

1. Hold the knob down until the set temperature is canceled.

   1. The small green circle should turn off.

2. Switch the hot plate off.

3. Unplug the hotplate.

Parameters

Purpose

Stripping removes all photoresist from a chip. This is typically done after an etch step is completed, though it can also be used to remove resist before etching if you need to redo patterning.

Tools

1. Fume Hood with Sink

2. N2 gun

Materials

1. Chip with photoresist

2. Acetone

3. Isopropanol

Troubleshooting and Best Practices

Procedure

Stripping

1. Spray the entire chip with acetone

2. Rinse with IPA

   1. IPA must always be used after acetone to remove any acetone residue

3. Dry with nitrogen gun until the surface is entirely dry

   1. This requires you to blow dry the back of the chip as well. Surface tension tends to pull the liquid towards the back

Safety

Be sure to spray the chip over a sink. Do not use near source of high heat.

Purpose

We pre-dice wafers in order to:

• Limit the size of our DIY machines

  • Decreases the necessary movement range of nanpositioners

  • Other machines can be sized down

• Increase experimental throughput

  • Decrease cost of each raw materials

  • Decrease risk of breaking chip

  • Ease chip handling

Best Practices

See for reference

1. Open this sheet, claim the next available chip number, open the blank chip view sheet for that specific chip number and record all subsequent process data into it.

2. Use a

3. Lay the wafer on a hard, steady surface

   1. If the surface has some give, it will act as a spring when pressure is applied from the scribe

4. At an oblique angle, place the scribe tip at the edge of the flat side of the wafer

   1. Flat edge marks crystal orientation, cleaving should be easier along certain crystallographic directions.

5. Push down, don't think too hard, cleave.

   1. It may also help to press down and drag the scribe tip 1 mm outwards to the edge of the wafer.

6. Don’t move chip around with the diamond scribe to avoid scratches

   1. Use to move once a cut is made

The goal function of the Hacker Fab is to never debug the same thing twice.

We operate under different constraints from the semiconductor fab industry. This allows us to curb a lot of complexity.

Goals:

1. Low cost

2. Create the simplest designs possible

   1. Increase reliability

   2. Reduce manufacturing complexity

3. Minimal danger

4. Small size

5. No cleanroom

6. Highly sourcable materials

7. High literacy in understanding working principles of tools and processes

8. End-to-end custom - from sand to NAND

   1. Make the wafers

   2. Design the tools

   3. Design the processes

   4. Design the IC

   5. Package the chip

Non-Goals:

1. Reuse of existing fab equipment

The 1970s vs. Now

On Open-Source Hardware

Who we are looking for, how we grow, how to get support

Design Constraints

On Improvement

Central to the Hacker Fab is fast turnaround hardware development - it’s in the name. This means extremely fast hardware prototyping, and with that comes the need for iteration. The careful design constraints placed on all projects and focus on documentation enables someone else to iterate on anything developed in the Hacker Fab. Improvement to a V1, V2, Vn of a design means

1. Directly improving upon a tool’s functionality

   1. Precision

   2. Reliability

   3. Throughput

   4. New features

   5. Safety

But there are other equally important ways to improve a design. Every tool version should try to be:

1. Easier to manufacture than the last

   1. Reduce number of tools required to manufacture

   2. Reduce # of vendors, lead time, BOM length

2. Better documented than the last

   1. Tool specs as close to first principles as possible

   2. Every tool spec should have a standardized test for others to verify performance

   3. Explain working principles to the detail of variables we can control (no more, no less). Referenced sources.

3. More “closed-loop” than the last

   1. In-situ sensors

   2. Calibration software should be more generalizable (“now you can use any camera…any piezo with draw distance in range X to Y…”)

On Cleanliness

On Process Node

On Education

Where to Start

intro.

Our Goals:

1. Make integrated circuit prototyping as fast as 3D printing

2. Make DIY version of every nanofabrication tool

3. Get there with collaborative open source hardware

Right now we use factories and tools that are optimized to manufacture at scale to do our integrated circuit prototyping. There does not exist a set of machines that enable rapid tape-out of semiconductor devices on a budget, nor are there sufficient resources to make/modify fab tools from the ground up.

Nanofabrication is often communicated as complex magic, where every machine is immutable. We believe that innovation in the industry requires a thorough understanding of these machines from first principles, which will lead us to simpler solutions. Even on machines and processes of magnitudes less complexity than modern industry, there are designs worth sharing.

The use of low-cost, abundant, and fast-turn-around hardware serves a larger purpose than making the fab cheaper. These design constraints are what enable others to recreate, modify, and contribute to our work. The simpler the better.

working on the hacker fab.

You don't need prior nanofabrication experience to create meaningful contributions.

You do need to read the Required Reading.

You don't need to recreate the entire fab to contribute, although you can.

We communicate entirely over Discord.

this website.

This page is a home for all shared documentation. There are enough resources here to turn an empty room into one that fabricates simple IC's in a matter of months.

Many pages are works-in-progress. It is natural for individual contributors' work-in-progress notes to exist on google drive, notion, etc. Links to these exist at the top of each page, however these notes move to Gitbook as soon as possible.

Any contributor can submit change requests with a free Gitbook account. All of this is on Github, but formatted nicely here on Gitbook. You can contribute directly through Github as well.

For the most up-to-date status on everything, join the Discord.

fab toolkit.

Here is a list of all the tools built or bought necessary to make our devices.

Every build contains:

• BOM

• Links to Design Files

• Links to Code

• First Principles Understanding of Machine Design (WIP)

fabrication tools.

verification / metrology tools.

chemicals.

background and licensing.

The Hacker Fab was inspired by Sam Zeloof.

The Hacker Fab was started by Elio Bourcart, Alexander Hakim, and Sam Zeloof.

The first Hacker Fab was opened at Carnegie Mellon University, and currently managed by Matthew Moneck, Tathagata Srimani, and Jay Kunselman.

The Hacker Fab is run entirely by independent contributors.

By default, contributions use the following license stack, but may carry an additional NOTICE file depending on the origin of the contribution.

Purpose

The main purpose of this SOP is to describe a method that we can use to approximate the thickness of SoG. This is especially important in certain plasma etching processes, where removal of SiO2 is needed.

Tools

• Spectrometer

• Spectrogryph opened on computer connected to microscope view

• Calibration Graphs (should end with .sgd, can only be opened in the Spectrogryph app)

Picture of Spectrometer Below:

Materials

• Silicon Chip with 700B/P5O4 SOG

Steps

Setting up the software + obtaining spectrometer data

First, ensure that the spectrometer is connected to the computer.

In addition, place SoG on silicon chip sample on the slide under the microscope.

1. Open Spectrogryph software on Computer

2. Under Plot/Views, select “New Acquisition View”

After which, you should see something that looks like:

1. In the upper left corner, select “Device Type” and select ASEQ. Then press connect.

2. Change exposure to 5000 ms (or more, if you want less noisy data)

3. Select single shot or continuous

   1. Use Single Shot if you want to get one graph that is taken after 5 seconds of exposure

   2. Use Continuous if you want a graph that is constantly being recorded (hence changing)

4. Pressing “Acquire” would start the readings. Before pressing “Acquire”, ensure that the probe is connected to the microscope (will need to press the probe against the microscope to get good readings, as shown in picture below).

7. Once a graph of Count against Wavelength is obtained, we need to normalise the counts. This is done by clicking on "Process" and "Normalise (Peak)".

1. Once normalized, we can now save this spectral plot in file (save it in the .sgd format, so that you can re-open it in spectrogryph later)

Determining Thickness of SoG

1. Create another New Acquisition View

2. Drag the Calibration graphs file (should end with .sgd) into the New Acquisition View

You should see this:

The color of the graphs correspond to the actual observed colors of the glass. This can serve as a good benchmark as to what the thickness of your glass might be.

As seen, the SoG with the lowest thickness (190 nm) had the maximum peak at a wavelength of ~590nm. As the glass thickness increases from 190 nm to 255 nm, the wavelength at maximum peak increased accordingly. Following that, from 255 nm to 276 nm, it can be seen that a second peak is starting to form (at a wavelength of around 480 nm). Finally, from 276 nm to 314 nm, the peak at 590 nm disappears, and now the peak at 480 nm becomes more distinct.

1. Lastly, drag the .sgd file that you previously saved in Step 7 into the plot above.

2. Determine which shape your graph most closely resembles to determine SoG thickness.

Also note that the color of your glass is a pretty good indicator of what thickness it will be. So for instance, if your chip looks pink, just by looking at the calibration graphs, we can determine that thickness is around 270 nm.

Useful Links

• Spectrogryph Manual Website: https://www.effemm2.de/spectragryph/about_help_manual.html

For a description of what the team at CMU is working on in Spring 2025, check out !

Goals of this page:

• Not to try and cover theory or industry standard, but to break the problem into first principles just enough to give context to the quantifiable parameters

• Also an opportunity to frame the problem wide enough to set the tone of thinking of these machines from the ground up (aligned with goal, don't think of industry as immutable)

• Exhaustive list of industry methods and examples

• Quantifiable end user parameters with descriptions + standardized tests

Background

Overview

A photolithography stepper is a machine that exposes a pattern of light onto a layer of photoresist chemical on the wafer, then ‘steps’ over to the next pattern. Before each exposure, it must align with previous patterns on the wafer so that each layer of the device is in the correct position relative to the previous. The accuracy with which it can do this is called “alignment accuracy”. Alignment accuracy and optical resolution are the two most important metrics of a stepper’s performance.

There are 2 main components of our stepper: the light source and optics, and then the mechanical micropositioning stage that moves the chip itself. Alignment accuracy is a function of both the mechanical micropositioning stage and the reliability of the projector’s optomechanical components.

Masked vs. Maskless Lithography Systems

Commercial lithography machines use photomasks to create the image, typically made of chrome on glass. Instead, our Maskless Photolithography Stepper uses a DLP projector to create a pattern. This allows us to change patterns instantly, opening the option up for advanced techniques like tiling (making a circuit larger than one exposure field).

Quantifiable Parameters

Functional Specifications: The End Product

Patterning Machine Specifications:

is a powerful technique for characterizing semiconductor materials and devices, especially the transistors that we build in our fab. The shape of the CV curve will provide information about the doping concentration in the silicon substrate. On this page, we will detail how to take CV measurements of your devices.

Equipment

• Probe station (see for standard operating procedure)

• Capacitance-voltage meter (i.e. Keithley 4200-SCS Semiconductor Parameter Analyzer)

Procedure

Prepare the Transistor:

• Ensure that the transistor surface is as clean as possible to minimize probe-to-pad contact issues. It is helpful to have another user with you to properly align and contact the pads without damaging other probes or the transistor surface.

• Ensure that the transistor is properly connected and biased for C-V measurements (i.e. for an NMOS transistor, ground the bulk and source contacts, apply voltage from the gate or drain depending on the type of measurement).

Measurement Setup:

• Set up the CV measurement equipment, we use a Keithley 4200-SCS Parameter Analyzer as our test equipment and Probe Station for circuit connections. Please follow the steps given in the to ensure proper probe-to-pad contact with the transistor.

Voltage Sweep:

• If using an NMOS transistor with 3 terminals (i.e. no bulk contact), turn off the bulk probe on the KITE interface, ground the source pad, apply a small-signal AC voltage to the drain pad (constant frequency ideally above 100 Hz, low frequency measurements will be performed later), apply a large-signal DC voltage sweep to the gate pad (-8V to +8V for our case). Measure the total capacitance from the gate pad as well. If your NMOS transistor has a bulk pad as well, it is possible to modulate the bulk potential and model threshold voltage dependencies. For regular use, grounding the bulk and/or at least having it at the same potential as the source pad is ideal.

• It is also possible to model the MOSFET as a MOS capacitor instead by connecting source and drain to the ground and only by sweeping the gate voltage. This “topology” may be deemed ideal to extract capacitive parasitics from the measured total gate capacitance:

  • When in accumulation (VGS < 0), mobile holes from the p-type substrate form a dielectric region due to being attracted under the gate. The total gate capacitance is the sum of the gate-source and gate-drain overlap capacitances, along with the gate-bulk capacitance.

  • When in depletion (VGS is a small but positive voltage), some number of mobile electrons are attracted under the gate but not enough to fully invert the net channel charge, therefore the region under the gate simply becomes devoid of mobile charges, but becomes more negative as the gate voltage is increased. Total capacitance is the sum of the overlap capacitances (which are often neglected due to their small magnitude) and the oxide capacitance (between the gate oxide and the induced weak negative channel) in series with the depletion region capacitance. This parallel topology decreases the total capacitance.

  • When in inversion (VGS >> 0, much larger than the threshold voltage required to “turn on” the MOS), a substantial number of electrons are attracted under the gate such that a strong conduction channel forms. The conduction channel forms the bottom plate of this virtual capacitance, and the distance between this bottom plate and the gate decreases as the channel inversion becomes stronger (with increasing gate-source voltage), increasing the total capacitance. Apply a DC voltage sweep to the transistor, typically from negative to positive bias (usual measurement range is from -8V to +8V). Measure the capacitance at each bias voltage.

Plotting CV Curves: Plot the measured capacitance as a function of the bias voltage. Below is an example of a measured capacitance versus applied voltage (C-V) curve. Note the decrease in the total capacitance as the mode of operation changes from accumulation in the deep negative voltages to depletion as the capacitance decreases significantly. There is no bulk contact in this measured NMOS transistor, and therefore the inherent and uncontrollable modulation in the bulk potential may be preventing the change of the mode of operation from depletion to inversion (note the lack of increase in the capacitance as the gate potential approaches +8V).

Analyzing C-V Curves: The shape of the CV curve will provide information about the doping concentration in the silicon substrate.

• Dopant Concentration (ND): To measure the concentration of the deposited donor atoms, either the source or the drain terminal of the NMOS is used with respect to the bulk. If the drain and the gate are grounded, the subsequent capacitance measurements will be done between the bulk and the source terminals. Since the source and the bulk regions are oppositely doped, they form a p-n junction with a depletion region in between. This structure presents inherent diode and capacitive properties, which is ideal for doping concentration and profile measurements. The average doping should be extracted to later calculate the Debye length (in plasma physics, the distance at which a charge (among a sea of other charges) is shielded against electrostatic forces of a charged plane, such as that of a capacitor), flat band capacitance and bulk potential.

• Flatband Voltage: Flat band voltage is the voltage that must be applied to the gate terminal at which the metal-oxide-semiconductor interface potential becomes equal in magnitude to the built-in potential, making the surface potential zero. Since the presence of a flat band condition affects the accumulation of charges for accumulation or inversion channel formation, it is an important parameter to extract for the modeling of the threshold voltage. VFB is usually interpolated from the C-VGS curves, if and only if the doping profile is assumed to be uniform over the region and interface trap state density is large. Otherwise, measuring the flat band voltage is finicky at best and extremely difficult at worst due to our fabrication methods.

• Metal-Semiconductor Work Function Difference: The work function difference is a key parameter in determining the threshold voltage of the MOS transistor since the WMS forms a potential barrier against the inversion of the channel. The bulk potential, which is extracted using the doping profile, is an input to WMS.

Model Fitting: As a general rule of thumb, for long-channel devices such as ours, 1 MHz is the frequency at which high-frequency measurements are performed, while low-frequency measurements are generally performed at and below 100 kHz, down to 1-10 Hz.

Use semiconductor device simulation software or a theoretical model to fit the experimental CV curve to theoretical curves, which depend on the doping concentration. This can provide a more accurate estimation of the doping concentration. See the ideal CV curve below:

Extract Parameters: From the fitting or analysis, extract parameters such as doping concentration, and threshold voltage using known parameters such as oxide thickness. See page 10 of for a detailed explanation of the relevant equations. has an implementation of those equations in MATLAB.

Future Work

As of June 2024, we are currently working on our own custom probe station and source-measurement unit, as described . Once this is complete, we will be able to use our new setup to take CV measurements. We will update this page accordingly once this is done.

Reference Sources

Overview

The Hacker Fab was built on the Django framework using Python, with HTML and CSS serving as the front-end. The code in this . The purpose of the database is to store data related to chip fabrication in our labs and use the results to refine our process parameters. It is crucial that we maintain a comprehensive and functional data store in order to develop new processes and to help new Hacker Fabs begin fabrication.

The database was created in Spring 2024 with the ability to create new chips, add process parameters to each chip, and query back results from the database. The front-end had simple styling, although they were not reflected in the production website due to issues with certification. The motivation for our improvements in Fall 2024 was increasing the intuitive usability of the website, as well as adding more functionality for the user. hi

Design Choices

Web Hosting Platform

The website hosting options up for consideration were Amazon Web Services (AWS), Google Cloud Platform (GCP), and Microsoft Azure. AWS was ultimately chosen because it had the longest free period and we had the most experience working with it. We use EC2 because it has the most flexible options and high availability in many geographic regions. The website is not very compute-heavy, so we chose a small instance to keep costs down.

Model/Schema Changes

The code has a model-view-controller (MVC) structure. Each fabrication process is described as a model (in ), with each field representing a process parameter or documentation artifact. This translates to each process being stored as a separate table within the database. This semester, the models were updated to constrain parameters to specific data types in order to maintain consistency and correctness in the database. For instance, temperature was stored as a decimal value, duration as a positive integer, and material type as a string. Some models and fields were renamed as well in order to clarify their meaning. We worked closely with the process development teams to understand which fields should be included or what new models should be added. Relevant Django documentation:

In order to allow the user to interface with the database, there are input and search forms based on the models (in ). As of this semester, the input forms require certain parameters that are measurable and critical to the fabrication process, as well as prefilled default values for standardized parameters in our primary NMOS process. The search forms do not have any required fields, since we should be able to search process data for every chip and parameter value. This semester, the search forms were also updated with input fields that would provide users with the ability to perform searches given a specified range of values. The labels to these forms were also refined to be more readable and include units to aid in correct input. Relevant Django documentation:

User Interface

We identified that a non-intuitive workflow and lack of visual cohesion were affecting the usability of our website. One major change was the inclusion of “chip pages” that show every process done to a chip and eventually will allow for edits to the data associated with it. Previously, the only way to see that data was to search the database by chip number. This process was not intuitive because users are usually working with a single chip at a time, so it made more sense to have a centralized location to view that relevant information.

A change for the search page was the use of horizontal tables to display data for a process. In other words, for a single entry, each column represents a certain field in that entry, and each row is a distinct entry (previously, the first column was the field name, the second column was the value, and additional fields for a given entry were displayed in their own row). The horizontal table display makes it much easier for users to distinguish between different entries for chip information and process parameters. Furthermore, we modified the search page to display all filter categories to the user under an umbrella “Advanced Search” dropdown. This allows the user to see all the search options at once instead of having to submit a process. Lastly, to make it easier for users to interpret the data that is presented to them in the search page, we added functionality that allows users to group the search results either by the process types they have selected, or by the chip number.

The chip creation page will also have the option to use a “chip profile” or “chip default” that prefills parameter values associated with an established process, such as the NMOS process we use for class labs.

An important addition to the Patterning process in particular is the ability to add multiple patterns in the same step and click on a gray rectangle to approximately note the location of that pattern. This way, it is easier to record the application of multiple patterns at the same time as well as locate a specific pattern when returning to the chip.

Main Controller

The different web pages in our website are served by their own controller functions which are located in . We designed the backend architecture to have a separate function that serves each unique web page. This design allows us to modularize our backend logic and isolate functionality to those specific pages so that they can be as customizable as possible. If similar logic is used across different web pages, we put this logic in helper functions to avoid having duplicated code. The different controller functions for each page serve the main functionality of our website. Routes between the addresses to these pages and the functions that serve them are specified in . The controller links the different HTML pages together, performs the database operations, and interfaces with the backend. It determines what form to display based on what process the user selected, saves the form data and passes it to the database after cleaning, displays search queries by the user, and renders the web pages.

Main Controller: Querying Data

As our website serves to display database entries to our users, a crucial functionality is querying data (related to process parameters and chip information) and rendering it on the page. These are the different pages where data querying is critical:

When a user performs a search for data, they can enter specific filters to narrow down their results. These filters are passed to our controller when the user fills out a search form filled with parameter values. In our controller, we use Django’s Q() objects from their to create and execute SQL queries. This simplifies the process of extracting data from our database since we just need to create a Q() object using the filters specified by the user then apply the filter on our models. This querying is done in the function . Data querying is one of the most computationally intensive components of our database; hence, it can be considered as a bottleneck. Querying data for a single model (i.e. process type, user profile, etc.) has a worst case complexity of O(M), where M represents the number of rows that exist for a particular model in our database (the total number of unique entries of that model stored in our database). In the search page, the user is able to conduct a search to retrieve data from multiple process types. In this case, the worst case complexity for the search is O(P*M), where P represents the number of different processes the user has selected, and M represents the number of rows that exist for a particular model in our database.

The code in is responsible for passing the data from the query result to the html files so that they can be displayed on the web page. There is an important detail that developers should take note of when implementing any functions that return queried results to users. We have implemented a specific data format to pass to the html page in order to standardize the design of the html pages and controller function outputs. When an html page is rendered, provides it a context, which contains data (variables) that are required by or will be displayed in the html page. The html page expects the queried data provided in the context to be an array of arrays of dictionaries. Since Django’s querying library returns the queried data to us in the form of a , we must convert the QuerySet into an array of dictionaries using Django’s model_to_dict() function found in their library. Each dictionary represents a single entry in the database. The keys correspond to the column names, which map to the corresponding value for that column. Each array of dictionaries within the outer array corresponds to a grouping of data. This enables us to group data based on the process types so that they can be displayed on the page with the correct column headers. This data structure is depicted below.

Diagram representing the data structure of the query results passed as a context to be rendered in the html

!!!!!!!!!!!!!!!!!!!!!!!!!! System architecture for interfacing with tools (the spincoater for now) !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

SEE this link for better formatting: https://docs.google.com/document/d/1SrD66bqmS1xxs2jt_WWSY7eLr6vyDJxIB4dbMdbxkws/edit?tab=t.0#heading=h.ai1m6262yla9

Parameters

Purpose

The primary use of the tube furnace is for diffusion of dopant atoms into silicon. The incorpoation of dopant atoms into the Si lattice creates defects in the electronic structure, which are charge carriers, increasing the conductivity of the diffused region and making it either N or P type. Diffusion of a solid into another solid is quite slow, so high temperatures and long times are needed, hence the high-temperature tube furnace.

Our process uses spin on glass containing phosphorus for N doping and boron for P doping.

Tools

1. Tube Furnace () with Quartz tube

2. Quartz rod

3. Quartz microscope slide, or Fused silica boat

Materials

1. Chip with glass containing phosphorus or boron.

Procedure

Pre-heating the Furnace

1. Turn on the furnace.

2. Press and hold “set/ent” for three seconds until “mode res” is showing. Press the up arrow twice until mode “LCL” is selected. Press “enter” once. Now the furnace will hold the temperature shown. Use the arrow keys to adjust and press “enter” once to set the setpoint.

3. If the furnace stops and holds at a lower temperature than your setpoint, the high temperature alarm may be too low. Read the instructions on to fix this.

Inserting chips

1. Put the Quartz microscope slide in the entrance of the tube. Do not use a regular borosilicate microscope slide, or it will melt inside the tube. The edge of a fused silica slide is pure white, while borosilicate is a little bit green.

A chip permanently fused to the tube furnace walls when improper slide was used 🔥

1. Place your chips on the slide.

2. Put on the heat resistant gloves.

3. Use the glass rod to push the slide into the center tube, being careful to not scratch the inside of the tube too much

   1. Measure out how far the glass rod needs to be pushed in to place the chips atthe center of the tube furnace.

4. The rod is extremely hot, and will auto ignite what it touches, or burn through flesh. carefully place it a top the tube furnace

Removing chips

1. Use the glass rod to push the slide to the other end of the tube.

2. Wait a few minutes for the slide to cool down.

3. Use metal tweezers to take the slide out. place it on the upside down beaker to allow it to cool further

4. Wait 3 minutes before handling the chip.

Safety

The furnace is obviously very hot. Keep away from any hot parts of the furnace. The rod will heat up in the few seconds that it is inside the tube, so when removing it, only hold it by the colder end.

The rod and tube also channel heat out of their ends via internal reflection of radiation.

Purpose

Deposit thin films of Aluminum onto the chip so that we can make electrical contact with doped Si and make interconnects between those contacts.

Materials

Procedure

• Put on nitrile gloves.

• If the Pfeiffer turbo pump is on, power it off by pressing the button pictured below.

• Use the arrows to scroll to parameter 309, which show pump speed.

• wait until the pump speed is at 0Hz

• Slowly vent the chamber by unscrewing the vent screw located on the turbo pump (behind the chamber)

  • Try to increase 1 order of magnitude every 10 seconds

• Wait until the pressure is at 1E3 hPa or greater (pressure is given by parameter 340).

• Unskrew the two black knobs pictured below (B), then lift the chamber lid.

• Turn the two black knobs on the top of the blue box as shown in Figure 1, and open the lid.

• Make sure youre wearing nitrile goves.

• The tungsten filament is secured with two barrel connectors piuctured below (B). The filament can be removed by slightly loosening the screws closest to the filamnet.

• Tightly wrap aluminum around the Tungsten coil. The filament becomes brittle after evaporation, so be careful not to break it. if you do break it, use a new filament

• Place the tungsten filament back and screw it in. Make sure it is straight.

• Place ~ 1 inch of poly ide tape on the substrate holder shown below (A), then peel off the clear layer on top of the tape. Since aluminum often covers the square box, when you put the tape on, aluminum might stick to it and flake off. Just continue attempting to apply tape until it stick without flaking off.

Evaporation

• Place your chip on the yellow tape, and use tweezers to gently press down on the corners of the chip.

• Double check that the metal sheet at the back is not bent and still covering the vacuum.

• Double check that the wire and barrel connectors are suspended and not touching anything conductive as to short them.

• Use a multimeter to ensure no continuity between the power and ground wire going into the chamber.

• Close the blue lid and screw the black knobs all the way.

• Close the vent all the way (hand tight)

• Turn on the pump.

• Screw the black knobs more since they tend to loosen after the pump turns on.

• Wait for the pressure to reach at least 6E-5 hPa. This will take 10+ minutes depending on how clean the inside of the chamber is, and how well it is sealed.

• Turn on the power source as shown below (A)

• Press start on the STM software

• Slowly turn up the current on the power source until ~30 Angstrom/s is reached (do not exceed 45 amps). Keep adjusting the current to keep the rate between around 30 Angstrom/second until the thickness hits 5 kÅ, or you can no longer sustain the rate.

  • If you click the dial, you can change the digit.

  • The voltage and power will automatically change as you adjust the current, so you do not need to worry about it.

  • The pressure might increase during evaporation.

• After the thickness hits 5 kÅ, TURN THE CURRENT BACK TO 0 AMPS BEFORE TURNING OFF THE POWER SUPPLY.

• Press stop on the STM software.

• Turn off the vacuum pump. WAIT until parameter 309 shows 0 Hz.

• Slowly vent the chamber by unscrewing the vent screw located on the turbo pump (behind the chamber)

  • Try to increase 1 order of magnitude every 10 seconds

• Open the chamber, and peel the tape off with your chip.

• Use polymer tipped tweezers to grip the sides of teh chip, then use separate pair of tweezers to peel the tape off the chip.

Purpose

After fabrication, the chip must be tested to demonstrate the functionality of the design. Additionally, variations and errors in fabrication may result in differences in device characteristics which are useful to document when these variations cause the device to fail.

To enable precisely controlled experiments on microscopic chips, we currently use a probe station to contact the device using sharp probes which supply and measure voltages for calculation of various device characteristics such as I-V curves, which are explained in this SOP.

Tools

• Probe station setup

  • Probe station - Karl Suss PM5

  • At least 4 probes, manipulators, and coaxial to split jumper wires with hooks at the end

• Microscope setup

  • Camera - AmScope MU1000-HS and AmScope viewing software

  • Light – MI-150 Fiber Optic Illuminator

• Semiconductor analyzer system

  • 2 Analog Discovery 3s

  • Laptop with ability to connect to camera and analog discovery 3s as well as run a python program

Materials

• Devices under test – typically a finished chip with pads for probing

• Computer running and Python program

Procedure

Setup

1. Place the chip in the center of the stage and turn on the vacuum.

2. Turn on the microscope light, which appears as a spot of light on the stage.

3. Connect the microscope camera to your computer and select the camera MU-1000HS on the AmScope viewer software, which should summon the camera view.

4. Open the analyzing software on a laptop

5. Raise the stage using the lever. Focus the stage and center the pattern of interest under the light source using the knobs below the stage.

6. If the probe tips are not illuminated by the microscope light, carefully move the magnetically-attached manipulators such that the range of motion of the probe tips is within the spot of light.

7. Using the knobs on each probe’s manipulator, lower the probes so that the tips are focused yet not touching the chip, then position the probe tips above their corresponding probing pads.

8. Carefully lower the probe tips to touch the pads, which is generally indicated by resistance to movement when attempting to lower the tip further. The manual nature of this process means that the sharp probes can scratch the chip and damage the device beyond future usage, such as scratching the pads off.

9. Using coaxial cables connected to the jumper wires with hooks, connect each probe to the ground, source, and drain on the Keithley and connect the corresponding red hooks to the equivalent ground, source, and drain pins on the circuit board as well as all the black hooks to the drain pin on the circuit board like in the below picture

Run Program

1. Run the command python3 smu.py in terminal to run the program

2. This will open up a new window with a plot of the IV Curve that looks something the below picture under MOSFET I-V Curve

3. In order to close this window and continue with the program, either hit the red exit button on the image window or go to terminal and type Ctrl-C

4. If the graph had errors, repeat the experiment as necessary

5. If the data looks good, enter the title for the current and image csv files

Cleanup

1. Remove the probes from the chip and continue to the next device, either by lifting the probes or lowering the stage.

2. Raise the probes using the manipulator knobs.

3. Lower the stage by turning the lever.

4. Disconnect the microscope from your computer and turn off the microscope light.

5. Turn off the vacuum and remove the chip.

MOSFET I-V Curve

The outputs currently look something like this:

The I-V relationship between the two probes and resistance estimated from Ohm’s law should be plotted. An ideal resistor should have a linear relationship and constant resistance.

Purpose

The purpose of the profilometer is to measure the roughness of a surface. Specifically, it is able to measure height differences across a region of interest (in one dimension) in the nano scale. This is useful especially after etching processes, where we can measure how much etching was performed on the chip.

The precision of this instrument is ~20-30 nm.

Materials

• Profilometer

• Your chip

  • If you are learning how to use the profilometer and do not have any patterns yet, you can use Chip 365 (there is a pattern on it, and it is also used in this tutorial)

The profilometer (right) is connected to a very old computer (left). The profilometer contains a metal needle tip that is used to measure the roughness of a surface.

Procedure

1. Place chip on stage

   • Ensure that you don't place the chip in the ridges, and this can lead to a runtime warning

2. Switch on the light on the stage, ensure that chip is under the light

1. On computer, go to Display > Video to visibly see the chip. Also, select Sample Positioning in order to see where the stylus will start measuring.

1. Move chip until you are able to see the cross hair being in line with the edge of your patterns.

   • Chip can be moved using the knobs as seen in Figure 2.

   • Ensure that you don't touch/bump into the metal tip as it is very sensitive and delicate

2. Go to Stylus > Stylus Down. This will move the stylus down to the chip and it should be aligned with the cross hair.

   • If the stylus is not aligned with the cross hair, double click on the new location where you want the cross hair to be. You will be prompted to update the cross hair location.

1. Go to Run > Run Single Scan to start an experiment. The stylus will start moving.

   • If it runs into the AD conversion error, keep retrying (the error tends to go away after 5-6 times, see bottom of this document for photo)

Results and Data Analysis

1. After the run is completed, this should be seen:

As seen in the Figure above, we can see two "bumps", which are where we want to collect our data. However, we can also see that the graph is slanted, which means we first need to level our data.

1. Levelling plot: Move the red and green vertical lines such that in between those lines, we have a relatively flat region (as seen in Figure 6). Go to Plot> Level. We should now see this:

1. In order to measure the step height, drag the red and green vertical lines such that in between these lines we have the region of height difference (shown in Figure 7). The height difference is captured as Vert_D. In this case, we an see that it is 2425 Angstroms, which translates to around 243 nm.

Other Features

As seen in Figure 7 above, some regions are "bumpy". In order to get the average of these "bumps", one can go the Bands > Create Band and set a specific distance. For instance, in Figure 8 below, we have taken the average of 50 nm to the left and 50 nm to the right of the region of interest.

Errors that might occur

1) Timeout Waiting for AD Conversion

This error happens very often. In order to fix this, perform multiple runs (usually around 5-6 times) until the timeout notice is no longer shown.

Parameters

Purpose

The oxidation growth of the silicon layer creates a layer of insulation to prevent direct flow from the conducting MOSFET layer to the metal gate.

1. Tube Furnace () with fused silica tube

2. Fused silica rod

3. Fused silica microscope slide

Tools

1. Tube Furnace () with fused silica tube

2. Fused silica rod

3. Fused silica microscope slide

Materials

1. Pure silicon chip (not pre-deposited)

Procedure

Pre-heating the Furnace

1. Turn on the furnace.

2. Press and hold “set/ent” for three seconds until “mode res” is showing. Press the up arrow twice until mode “LCL” is selected. Press “enter” once. Now the furnace will hold the temperature shown. Use the arrow keys to adjust and press “enter” once to set the setpoint.

3. Wait ~15 min for the furnace to come to temperature.

4. If the furnace stops and holds at a lower temperature than your setpoint, the high temperature alarm may be too low. Read the instructions on to fix this.

Inserting chips

1. Put the fused silica microscope slide in the entrance of the tube. Do not use a regular borosilicate microscope slide, or it will melt inside the tube. The edge of a fused silica slide is pure white, while borosilicate is a little bit green.

A chip permanently fused to the tube furnace walls when improper slide was used 🔥

1. Place your chips on the slide.

2. Use the glass rod to push the slide into the center of the tube, being careful to not scratch the inside of the tube too much. Start the timer.

3. Place the rod on top of the tube furnace (it will be hot).

Removing chips

1. Use the glass rod to push the slide to the other end of the tube.

   1. Push the slide all the way to the end until it is reachable.

   2. Put the rod on top of the tube furnace (it will be hot).

2. Wait a few minutes for the slide to cool down.

3. Use metal tweezers to take the slide out. Don't use the orange ones because they don't close all the way.

4. Put the slide on a heat resistant surface and wait 5 minutes before handling the chip.

Safety

The furnace is obviously very hot. Keep away from any hot parts of the furnace. The rod will heat up in the few seconds that it is inside the tube, so when removing it, only hold it by the end.

The rod and tube also channel heat out of their ends via internal reflection of radiation.

Links and Videos

Simple MOSFET intro video (5 min)

Sam’s Youtube video overview (5 min)

• Nearly identical to what we do

• What our work was based on

Device Physics Overview (30 min)

• Electrons, bandgap, etc.

Before we had transistors, we had lightbulbs (18 min)

• Then we moved to silicon

• This stuff is regularly communicated as complex magic, and requires the permission of billionaires to work on it. We are starting from 1960’s level complexity and working our way up to modern complexity.

The creation of the blue LED (30 min)

• Extremely well told story of the man who figured out how to manufacture blue LEDs

• We are not the first people to claim that innovation in the semiconductor industry requires intimate knowledge of the fabrication tools

Fabublox (∞)

• A fantastic tool being developed by friends at MIT. Overview of many processes, with each being a linear recipe

• Make an account, and go to “fabubase” in menu

• Check out our Hacker fab process, as well as others

• Go through and try to recreate our process from scratch without cheating. See how far you get, and write down things that don’t make sense (1 hour)

How do these things even make computers?

• How we turn sand to intelligence

• Making logic gates from transistors (13 min)

Transistor → logic gates → basic logic circuitry (timers, counters, latches, shift registers, etc.) → architecture abstractions that people made up over decades → CPU

TinyTapeout Video Example: Making ASIC

• Application Specific Integrated Circuits

Not all transistors are created equal

Below: ideal transistor IV curve vs. our first curves.

These both exhibit transistor-like characteristics. Looking back at the Veritasium video about how the first computers were made with lightbulbs - a transistor really boils down to a repeatable switching action. When we look at our curve on the right, we see multiple issues:

• The curves don’t go through the origin, they start with a voltage offset

  • This means that when we apply a voltage to the gate (open the valve to allow current through), current doesn’t run through the drain to the source until we apply ~3V to the drain/source connection.

• The lines are all squiggly?

So we try to debug this by finding literature that debugged something similar, or often we simply design and run more experiments. Skim through pages 172-176 (bottom corner number, not pdf page number) of this document. Their transistors have very similar issues to ours. When you read this document, the answers are behind a huge layer of jargon and acronyms that make the barrier to entry for understanding extremely high.

In reality here is what it is saying:

• Our source-drain is dominated by an aluminum metal-to-silicon Schottky junction instead of doping

Put simply, we just directly connected an electrical characteristic (IV curve) to a physical process parameter. We now have an exact experiment to try over the next week:

• Less metal annealing

• More Si02 etch before metal deposition (to ensure metal contacts Si instead of SiO2)

Right now it takes about 8 hours of work + waiting overnight to turn a blank wafer into one with NMOS transistors on it. Then we go to the probe station, test it, organize the data, look at the graphs, and think. That’s how long it takes to verify each new experiment. With each machine, script, or management tool we create, we push to significantly decrease this iteration cycle.

We've only made NMOS devices so far, but there are so many more things to be made. That means our process data corresponds to NMOS only, but most process steps can be generalized to any process if documented properly.

Each unique device can also use different materials entirely, which requires different machines.

• What metal are we depositing?

• What does the doping profile look like?

• etc.

Vacuum Chamber Assembly

After purchasing and receiving all parts outlined in the Evaporator Bill of Materials, follow the step-by-step process to assemble the vacuum chamber.

1. Assemble the chamber frame and plates

(i) Wrap an O-ring around each plate to ensure the chamber has a tight vacuum seal.

(ii) Screw in each plate with 8 bolts into the frame as shown in the following image.

Note: Plan where you want each plate to be (i.e. top, bottom, side) depending on your setup

2. Attach feedthroughs and/or blank flanges

Each opening must be covered and sealed for the vacuum to exist. Therefore, each opening needs a feedthrough in it or a blank flange to cover it. Ensure that each part has the correct dimension to properly fit in its corresponding port.

(i) Pair up the feedthrough/flange with its matching O-ring and clamp.

(ii) Layer the parts in the following order. Starting from the bottom closest to the plate place the O-ring, flange/feedthrough, and clamp. Then attach all necessary screws tightly. Repeat this process for all openings.

3. Turn a face into a door and attach feet

(i) Screw in the hinge into two adjacent plates where you want the door to be.

(ii) Attach knobs on opposite side of hinge to open and close the door securely.

(iii) Attach feet to the bottom of the chamber to minimize vibration.

Final product

Pumping down the Vacuum Chamber

1. Attach the turbo pump to the chamber

Connect the turbo pump (Hi-Cube 80) to the KF-40 plate using the corresponding KF-40 flange and O-ring. Since the turbo pump has a lip that makes it difficult to tighten the screws, we recommend using hex shaped 10-32 x 5/8" screws and tightening with a wrench.

2. Connect the pressure gauge

The Pfeiffer MPT 200 Gauge has a KF-25 connection port. To optimize the 6 plates we chose, an adapter from KF-25 to KF-16 is needed to connect the pressure gauge to the vacuum chamber. Attach using a KF-16 flange to the plate and a KF-25 clamp to connect the adapter to the pressure gauge.

Implement Heating Parts

Heating the vacuum chamber is necessary for two reasons. First, high temperatures of approximately 1200˚C are needed to evaporate the aluminum and perform the thermal evaporation process. Second, heating the chamber allows it to bakeout, meaning that the water trapped inside evaporates allowing the vacuum to achieve a lower pressure.

Our setup consists of two parts: the crucible and the substrate heater.

Crucible Set-Up

The crucible is comprised of the following parts:

• Tungsten Filament

• Alumina Thermal Crucible

• Insulating Bucket

After assembling these parts together, connect the copper power feedthroughs to either end of the tungsten filament using an inline barrel connector.

Ceramic beads can be used to safely insulate the metal and prevent electrical misconnections.

Next, connect a power supply to the external end of the power feedthroughs to heat up the crucible.

Finally, attach the thermal breakout board and arduino to the thermocouple to read the temperature values.

Preface

These pages will present the current proposed machine design plan and the work completed to date for our vertically aligned, cold-walled reaction chamber ALD machine for the Hacker Fab at CMU. The Fall 2024 semester's efforts at CMU are described here and the Spring 2025 efforts are described here. Please note that there were significant changes to the design of the chamber, precursor storage, and control systems from the Fall 2024 semester to Spring 2025; those aiming to replicate these efforts are recommended to review the Spring 2025 design changes. Once this project is complete, this page will be updated so as to present a finalized guide for the machine design and build.

Introduction

We are building a low cost Atomic Layer Deposition machine for the Hacker Fab to achieve improved gate dielectrics, which will help us achieve our goal of a 10 micron CMOS process as well as improve our capability in performing thin-film research. Our design work on it will be all open source, and we hope other labs can use our work to make their own ALDs at a fraction of the cost of commercial alternatives. We are building our ALD to fit 4" wafers so that it can be brought into the nanofab, which will help us lower the barrier to entry for researching thin film deposition and new materials. Although 4" is much larger than anything we are currently using in the Hacker Fab at CMU, this larger size will make it useful to a larger audience.

Our work thus far has been focused on machine design, largely drawing from two papers on “DIY” ALD machines: “Design Of Atomic Layer Deposition Reactors For The Deposition Of Nanoparticle Embedded Thin Films” by Michael Lubitz, and “Homebuilt Reactor Design and Atomic Layer Deposition of Metal Oxide Thin Films” by Pamburayi Mpofu. Each of these papers describes their machine design followed by some process development where they describe the settings (ie. temperatures and precursors deposition times) used in their initial depositions.

Bill of Materials

A complete list of parts and components used in making the DIY ALD system can be found here.

Precursor Selection

Oxide of interest

For the current system we aim to deposit Indium-Tin Oxide. Indium Tin Oxide (ITO) is a versatile material widely recognized for its excellent electrical conductivity and optical transparency. These properties make ITO a promising candidate for advanced applications, particularly as a channel material in thin-film transistors (TFTs). Its high carrier mobility and tunable electrical characteristics offer significant potential for improving TFT performance in display technologies and flexible electronics. Additionally, ITO thin films are of great interest in materials and thin-film research due to their unique combination of metallic and semiconducting properties. This makes them an ideal system for exploring novel deposition techniques, optimizing film uniformity, and investigating structure-property relationships.

The precursors for the metals were chosen based on their feasibility to react with water vapor as the oxidizer. The precursors chosen are Trimethyl Indium (TMIn) for Indium and Tetrakis(dimethylamino) Tin (TDMASn) for Tin with Nitrogen carrier gas. They have been shown to be used for ALD and CVD processes with water as the oxidizer in literature. As a starting point our aim would be to reproduce the results achieved in [Zhang et al.]. The process parameters highlighted in the paper are as follows (substrate temperature: -225C):

For the first attempts at deposition however, the research group at CMU will attempt to deposition Al2O3, as this process is well-documented in the CMU Nanofab. Then, the group will attempt to deposit more complex oxides such as ITO.

Safety Considerations

Most precursors and specifically metal organic precursors used for CVD and ALD processes tend to be pyrophoric (i.e. thermally unstable and spontaneously ignite on exposure to air) thus necessitating safety measures.

Material Considerations

Compatibility with the precursors and byproducts produced during reaction are important to consider when selecting components for the delivery system. For our given precursors the chemical groups for which we checked compatibility are: 1) ability to handle pyrophoric materials, 2) ability to resist corrosion due to water vapor, 3) compatibility with methane (by product of TMIn reaction with water) and dimethylamine gas (by product of TDMASn reaction with water)

The compatibility of o-ring materials was checked on the following sources: (1) (2)

Specific choices:

• Stainless Steel Tubing

• Aflas O-rings - conventionally used Viton O-rings are incompatible with dimethylamine

• Aluminum vacuum chamber

• Stainless steel bellow hose

• Vacuum pump - Although the vacuum pump manufacturer warns against using the pump with pyrophoric gases, this caution can be safely disregarded in our case. Since we will be working with extremely dilute concentrations of these gases, the risk of combustion or hazardous reactions is significantly minimized. The low concentration ensures that the gases remain well within safe limits, allowing for the pump's use without compromising safety or performance.

Sourcing Precursors

Given the safety considerations involved in handling the pyrophoric precursors, the sourcing of materials for ITO deposition is managed by the Claire & John Bertucci Nanotechnology Laboratory staff. They ensure that all necessary precautions are taken during the procurement, handling, and storage of the chemicals. The required precursors have been ordered from Strem Chemicals, a trusted supplier known for providing high-quality materials for advanced research and industrial applications. TMIn, TDMASn

References

Z. Zhang et al., "Atomically Thin Indium-Tin-Oxide Transistors Enabled by Atomic Layer Deposition," in IEEE Transactions on Electron Devices, vol. 69, no. 1, pp. 231-236, Jan. 2022, doi: 10.1109/TED.2021.3129707.

“Design Of Atomic Layer Deposition Reactors For The Deposition Of Nanoparticle Embedded Thin Films” by Michael Lubitz

"Homebuilt Reactor Design and Atomic Layer Deposition of Metal Oxide Thin Films" by Pamburayi Mpofu

A portable USB-powered test and measurement device, also known as the AD3, is a digital oscilloscope, logic analyzer, waveform generator, pattern generator, and much more. Digilent WaveForms software makes it easy to acquire, visualize, store, analyze, produce and reuse analog and digital signals.

Hardware Specs

Total Cost:

Setup Time:

Technical Specs

• Output Voltage Range: ±5 V

• Accuracy:

  1. ±10 mV ± 0.5% (│Vout│ ≤ 1.25 V)

  2. ±25 mV ± 0.5% (│Vout│ > 1.25 V)

• Number of channels: 2 (custom channels feature available)

• DC Current Drive: 30 mA maximum

Setting up AD 3

1. Download the Waveforms software: https://digilent.com/shop/software/digilent-waveforms/

2. Run the .exe installer

3. Plug the Analog Discovery 3s into the laptop and open up the Waveforms software.

Circuit Setup

Set up the circuit that connects the Analog Discovery 3 like this circuit diagram:

The actual circuit will look something like this:

Manual Testing with Waveforms GUI (not sdk)

• For our purposes, click on Tracer (for IV Characterization).

• Click on drop down to select transistor type.

• Select “No Adapter”

• Select “Measure Id/Vgs” and set the ranges for the Vgs and Vds.
• Select step-size/no. of steps for both voltages.

• Click play (in the top right corner) and watch the magic!

• I-V Curve for ZVN3310A Transistor on Curve Tracer (replace this image with our chip curves).

Suggestions:

• Can adjust current compliance for Gate if needed. (below the main toolbar, right above the graph).

Automated testing with Waveforms SDK

Get the code from github by typing in terminal

>>> git clone https://github.com/joshna-ii/HackerFabSMU

Cd into this directory then run the below Python script in any environment where Python is installed by typing in terminal

>>> python3 smu.py

If this is the first time being run in this environment, make sure all dependencies are installed by typing the following command in terminal:

>>> pip install -r requirements.txt

Pre Spin Coating

1. Particulate/dust contaminating liquid SOG.

2. Explanation: If disruptions to the surface tension of the liquid SOG are seen before spinning, then some type of particulate is in the SOG and this warrants restarting the test. There are three possible causes of this…

   1. Dust landed onto the wafer after the SOG was applied

   2. Dust already existed on the wafer from improper cleaning

   3. Some SOG has hardened inside the bottle creating fine flakes of SiO2. These flakes then get sucked up by the pipette and deposited onto the wafer with the liquid SOG (Example picture above). This warrants preparing a new bottle of SOG based on this document.

Post Spin Coating

1. Particulate/dust contaminating wafer surface.

   1. Often, after spin coating disruptions to the SOG evenness/thickness can be seen in localized spots on the wafer. There are possible causes of this…

   2. Some SOG has hardened inside the bottle creating fine flakes of SiO2. These flakes then get sucked up by the pipette and deposited onto the wafer with the liquid SOG. These flakes are clear and sometimes not visible pre spinning, and are then only visible after spinning.

2. Particulate Landed on the wafer during spinning. Sometimes the spin coater can create turbulent air and kick up dust from inside the spin coater which then lands onto the wafer.

3. The wafer had a preexisting scratch or mark big enough to cause surface tension issues which result in the liquid SOG “un-wetting” in that spot and exposing the substrate. These scratches are often caused by scratches that occur during cleaving, slipping across the wafer when using hard tip tweezers, or dropping the wafer.

1. Radial variation in thickness/diffraction color

   1. Sometimes after spin coating, there may be a radial pattern of changing color on the wafer. The varying colors indicate variation in thickness since SiO2 is translucent so thin films diffract and appear different colors based on thickness. These variations are usually on the order of a few hundred Angstroms (A) (film thickness ~2000 A) and may not warrant restarting.

During Spin Coating

1. Wafer flies off the chuck while spinning

   1. Sometimes either due to bad two sided tape adhesion (regular spin coater) or improper sealing onto the vacuum chuck (vacuum spin coater). The chip may fly off the chuck due to inertial forces. This usually warrants restarting since when the chip flies off it hits the side causing uneven spreading of the SOG or lands onto the SOG.

Post-Anneal

Identifying “defects” in the deposited SOG

Pinholes

Possible Causes

1. Scratches or dust particles on the wafer Cause the liquid SOG to “un-wett” in some spots. This essentially creates a dip in the SOG layer that extends to the wafer surface below the SOG.

Particulate resting on top of the SOG

Possible Causes:

1. Dust coming into the fume hood and landing onto the wafer after the SOG layer has solidified.

Purpose

After fabrication, the chip must be tested to demonstrate the functionality of the design. Additionally, variations and errors in fabrication may result in differences in device characteristics which are useful to document when these variations cause the device to fail.

To enable precisely controlled experiments on microscopic chips, we currently use a probe station to contact the device using sharp probes which supply and measure voltages for calculation of various device characteristics such as I-V curves, which are explained in this SOP.

Tools

• Probe station setup

  • Probe station - Karl Suss PM5

  • At least 4 probes, manipulators, and coaxial cables

• Microscope setup

  • Camera - AmScope MU1000-HS and AmScope viewing software

  • Light – MI-150 Fiber Optic Illuminator

• Keithley semiconductor analyzer system

  • Keithley 4200-SCS Semiconductor Parameter Analyzer

  • Keithley 2636a Sourcemeter

  • Keyboard and mouse

Materials

• Devices under test – typically a finished chip with pads for probing

• Computer running AmScope viewer software

• Flash drive for data transfer

Procedure

General setup and cleanup

1. Place the chip in the center of the stage and turn on the vacuum.

2. Turn on the microscope light, which appears as a spot of light on the stage.

3. Connect the microscope camera to your computer and select the camera MU-1000HS on the AmScope viewer software, which should summon the camera view. The Keithley semiconductor analyzer has only two USB ports, which are currently occupied by a keyboard and mouse. Without WiFi or a USB hub, the camera view and data transfer are handled by another computer.

4. Turn on the Keithley semiconductor parameter analyzer.

5. Open the KITE software and the experiment of interest (see below sections).

6. Using coaxial cables and connectors, connect each probe to the corresponding port on the Keithley semiconductor parameter analyzer.

7. Raise the stage using the lever. Focus the stage and center the pattern of interest under the light source using the knobs below the stage.

8. If the probe tips are not illuminated by the microscope light, carefully move the magnetically-attached manipulators such that the range of motion of the probe tips is within the spot of light.

9. Using the knobs on each probe’s manipulator, lower the probes so that the tips are focused yet not touching the chip, then position the probe tips above their corresponding probing pads.

10. Carefully lower the probe tips to touch the pads, which is generally indicated by resistance to movement when attempting to lower the tip further. The manual nature of this process means that the sharp probes can scratch the chip and damage the device beyond future usage, such as scratching the pads off.

11. Press the green triangle in the KITE software to run the experiment.

12. Once the experiment finishes, check the data for errors and repeat the experiment as necessary.

1. Scale the graph such as by right clicking the graph and clicking Autoscale and save the data in a folder named chip### where ### is the chip number. To save the graph and data with a common name, type the name and click Populate, Save All, then Exit.

2. Remove the probes from the chip and continue to the next device, either by lifting the probes or lowering the stage.

3. After all experiments are finished, transfer the data to a flash drive and upload the data (such as to Google Drive).

4. Raise the probes using the manipulator knobs.

5. Lower the stage by turning the lever.

6. Turn off the Keithley parameter analyzer.

7. Disconnect the microscope from your computer and turn off the microscope light.

8. Turn off the vacuum and remove the chip.

MOSFET I-V Curve

1. Upon opening the KITE software, choose the vds-id test from under the section 4terminal-n-fet.

2. Configure the probes and measurements using the following parameters. Make sure that the correct coaxial cable (SMU1, SMU2, GNDU) is connected to the correct probe.

1. The I-V curve of the MOSFET and the gate leakage current should be plotted. Note the magnitude of the voltage and current measurements. Very low current in the range of nano-amperes or below can indicate an open circuit, and linear behavior can indicate a short circuit, which can arise from a fault in the device or improper probe placement.

Gate & Contact Resistance

1. Upon opening the KITE software, chose the res2t test froom under the section 2-wireresistor.

2. Configure the probes and measurements using the following parameters. Make sure that the correct coaxial cable (SMU1, SMU2) is connected to the correct probe.

1. The I-V relationship between the two probes and resistance estimated from Ohm’s law should be plotted. An ideal resistor should have a linear relationship and constant resistance.

Parameters

Purpose

Before reading further, please see the section for more information.

After thin films of Aluminum are deposited (whether it be Thermal Evaporation, sputtering, etc) onto the chip, we want to define isolated contacts to certain pats of the device, and define interconnects between those contact. To do this, the contacts and interconnects are patterned on top of the Aluminum surface with photoresist, and then wet etched. The contact pads that are left allow us to probe the device, or package it.

How It Works

Alumina etchant contains Phosphoric Acid, Nitric Acid, and Acetic Acid (all in one solution). The Nitric Acid Oxidizes the Aluminum, then the Phosphoric Acid etches the Aluminum Oxide, and the acetic acid lowers surface tension to help the etchant wet the surface.

Disclaimers

Phosphoric and Nitric Acid are extremely Hazardous, be sure to review the SDS for the Al etchant, and wear the proper PPE (Lab Coat, Splash Apron, Nitrile gloves (under), Neoprene gloves (over), Face shield)

SDS:

If under etching occurs, then all contacts will be shorted to each other. Over etching could result in less feature resolution, or Aluminum peeling off the chip.

Aluminum etch has proven difficult to keep consistent. There are many problems with peeling and bad adhesion of both photoresist on top and aluminum to the layers below.

Best practice is to calculate how long you should etch for, then etch for 30 seconds greater than that amount of time, then inspect, then etch longer if the etch looks incomplete.

Tools

1. Fume hood

2. Hot plate with magnetic spinner

3. Magnetic stirrer

4. Glass beaker

5. Appropriate container for acid (polypropylene)

6. Nitrile Gloves (under)

7. Neoprene Gloves (over)

8. Nitrile Splash Apron

9. Face shield

10. Spill kit and

Materials

1. Aluminum etchant (16:1:1:2 phosphoric, nitric, acetic, DI water)

1. DI water

Procedure

Preparation

1. Put on nitrile gloves

2. Place your chip on the cleanroom wipe taped to the inside of the acid hood. Do not leave the tweezers inside the fume hood.

3. Put on a splash gown.

4. Put on a face shield.

5. Put on the neoprene gloves. Avoid touching the outside of the gloves.

6. Pre-heat the hot plate.

7. Fill the beaker to about 1 cm with Aluminum etchant

8. Once the hot plate has reached the desired temperature, place the evaporating dish on the hot plate slightly off center so that the magnetic stirrer is on one side. turn on the stirrer.

Etching

1. After the acid has had 5 minutes to come to temperature, use DI water to rinse the black plastic tweezers and pick up the chip, then put it in the dish on the opposite side from the stirrer, then start the timer.

2. Rinse tweezers with DI water after.

3. Prepare to take the chip out 30 seconds before the timer is up. It can be tricky to grab the chip, so start early and drop it into the DI water when the timer expires.

4. Swish the chip around a couple of times and then take it and rinse further with the DI squirt bottle out and let it dry on the wipe.

5. Turn off the hot plate.

6. Take off the Neoprene gloves, Splash apron, and face shield.

7. Use your outside tweezers to pick up the chip and dry it off with the nitrogen gun.

Inspection

Incomplete aluminum etch looks black and rough.

Complete etch should look like the layer you were trying to etch down to

Peeling is very obvious as well.

Safety

While the acids involved in this step are not as aggressive as hydrofluoric acid, there are still many overlapping safety protocols to be followed. This document is NOT qualified to teach you all the required safety protocols and correct operating procedures - please refer to an SOP and more disposal and safety resources.

This document is an operating procedure for our specific lab, and is a reference for students to know how to consistently complete a successful etch.

1. Download Klayout from their websites and follow the instructions to install the software

2. After it is successfully installed, open the Klayout editor

1. To create a new layout File>>New Layout

1. Set the initial layer(s) that you need. The current hacker fab process would require 5 layers which are substrate, poly, active, contact, and aluminum. This is just for getting started, you can always add new layers later if you need to do so.

The layers will be shown in the upper right corner.

1. Go to View>>Layer Toolbox to open the layer toolbox so that you can adjust the order of the layers and the texture of the layers based on your preference.

Double-click the layer to hide it. If you are drawing on a hidden layer, the following tip will show up.

1. To create a new layer, go to Edit>>Layer>>New Layer

1. Scroll your mouse to adjust the size of the grid

The grid can also be hidden through View>>Show Grid. When you need to export the masks as screenshots, the mask needs to be hidden.

1. Klayout has the following tools to draw the shapes. Press “shift” to draw straight lines.

1. Draw the rough shape of an object then adjust it to be the exact size by pressing “Q” to edit its property.

1. Mask Exporting (method 1):

   1. Go to Display>>Zoom Fit to maximize the size of the mask on the screenshot

1. Rename and sort the order of the layers according to the order of the fabrication steps. In this case, the easiest way is to sort them by name (0:substrate, 1:poly gate, 2:active layer, 3:contact hole, 4:aluminum)

1. To make the masks compatible with the lithography stepper, adjust the size of the substrate layer (layer 0 in this case) to be proportional to its resolution (3840x2160). In this set of masks, the size of the substrate layer is set to be 384x216. Under this setting, the actual size of the pattern coming from the stepper is 2.5 times the designed size.

2. Adjust the color and texture of the mask to be blue/red/black accordingly to make them compatible with the red focusing and UV focusing.

1. Hide or show certain layers based on the property of the mask and take screenshots via File>>Screenshot and save the mask.

2. Corp the screenshots since the exported screenshot would normally have white sides.

3. See step 11 for an alternative way of exporting the masks using Python scripts

1. Mask Exporting (method 2):

   1. Set up steps are the same as Step 10 a. to c. steps.

   2. Go to Macros>>Macro Development to write Maros in Klayout

1. Select “Python” and change the Macro Template to “Plain Python file”

1. Paste the following code into the Python file you just created. 1

lv = pya.LayoutView.current()
ly = pya.CellView.active().layout()


# top cell bounding box in micrometer units
bbox = ly.top_cell().dbbox()


# compute an image size having the same aspect ratio than 
# the bounding box
w = 3840
h = int(0.5 + w * bbox.height() / bbox.width())


lv.save_image_with_options('/your_directory/your_picture_name.png', w, h, 0, 0, 0, bbox, True)

1. Change the path to the folder where you want your images to be saved. Note that if the name of your folder or file starts with a number, it will give you the following error message.

1. The .png file of your mask will be saved in black and white. Be sure to adjust the color and texture of the mask to be blue/red/black accordingly to make them compatible with the red focusing and UV focusing.

Reference:

1 GDS to image https://www.klayout.de/doc-qt5/programming/python.html

Appendix 1. Klayout user guides

Klayout user manual from their websites:

https://www.klayout.de/doc/manual/basic.html

Shorter one for getting started with basic functions:

https://mycourses.aalto.fi/pluginfile.php/897248/mod_resource/content/2/KLayout%20Guide.pdf

Appendix 2. Masks for an NMOS enhancement load inverter

Background

In this Document

At its fundamental level, a piezo inertia actuator might seem quite simple: two contacting surfaces one of which alternates between moving slowly and quickly in alternating directions which, in turn, causes displacement on the other surface. However, there are many variables at play, all of which have significant effects on the efficacy of a piezo inertia actuator.

There is no single optimal solution to each individual variable, rather different combinations of variables function well together given specific piezo inertia actuator assemblies. Understanding the most impactful variables and their effects can simplify this process.

This document includes a list of specific variables broken down as closely to first principles as possible + a specific configuration that resulted in a working piezo inertia actuator.

Background

Piezo actuators are tiny stacks crystals that respond to voltage by physically expanding in a very repeatable way. The simplest of these crystal stacks simply expands and contracts in one direction. The magnitude of this expansion can range from single nanometers to multiple microns.

Actuator assemblies have been made utilizing this crystal stack by amplifying it's small expansion. This can be taken a step futher - by applying a sawtooth wave function to the piezo crystal, it can be made to expand slowly, but contract quickly. This, in tandem with some clever friction interfaces and dynamics, can be utilized to make a separate stage move much more than just the short range of the piezo draw (expansion) distance. It can effectively be used to move an infinite range.

1. Friction between A and B

The friction force between A and B is determined by the material choice, cleanliness, as well as the preload force Fa.

Having too much friction makes it harder for the slip phase of the stick-slip cycle to work. When the friction force is too strong, the inertia of A is no longer enough to overcome the higher friction force and the and surfaces do not slip; the assembly simply vibrates back and forth.

However, when the friction force is too weak the contact between both surfaces becomes inconsistent. This can also result in the stick phase being only a fraction of the draw distance of the piezo. Similarly to when there is too much friction, the assembly mostly just vibrates. This makes this hard to diagnose the issue.

It is also desirable for the surfaces of A and B to be hard.

As the piezo expands a very small amount (microns) any imperfections or change in angle between the A and B surfaces can cause the stick-slip cycle to fail and the actuator to get stuck. Therefore, having smooth surface finishes is desirable and increases reliability. Keeping the surfaces clean from debris has the same effect and also prolongs the lifetime of the surfaces.

Having a preload force between the and surfaces is paramount. If there were none, we would be relying on perfect alignment between the A and B surfaces throughout its range of motion.

Having a preload ensures that even if both surfaces are not perfectly aligned they maintain contact with each other. This preload force also and gives us control on the friction between A and B.

1. Planarity of A and B surfaces

If the piezo element is mounted on the chassis, and not the stage itself, then any slop in the stage mounting will propagate as the stage moves throughout its range of motion. This can increase or decrease the force between the magnet and the stage, as well as wedge the magnet's corner against the stage.

This is very unpredictable for the stage dynamics. Making more precise mounting for the stage is also desirable for other reasons, such as wanting a very linear range of motion (assuming that the magnet interface is operating properly to begin with). This can be expensive however, as the tolerances are on the order of microns.

A poorly mounted stage can be calibrated out when using a 3-axis system, curbing the finicky precise mounting and tolerancing.

1. Mass of A (Inertia)

The entire concept of a piezo inertia actuator relies on the fact that the momentum of the stage during the stick phase will continue and overcome the friction force between A and B during the slip phase. In other words, the piezo pushes the mass A some amount then quickly pulls back. Without sufficient A mass, the slipping phase becomes very difficult to achieve.

Piezos can exert very high forces when expanding (stick phase), so increasing mass does not put significant strain on the piezo actuator itself. During the slip phase, we only require enough force to overcome the friction force between and B.

1. Slew Rate of Driver

The rate at which the piezo can slip is just as important as the momentum of the stage. This is dictated by the capacitance of the piezo stack itself, but we have found that the more impactful variable at play is the slew rate of the driver. A proper driver that can pump or deplete voltage from the piezo in a matter of microseconds is critical to get consistent slipping action.

This can also dictate the frequency at which you can drive the stage, defining the maximum speed the actuator can move.

1. Waveform driving the piezo

Though a linear saw-tooth waveform is able to produce movement of the piezo inertia actuator, it is far from optimal. Using a linearly increasing or decreasing waveform is not ideal for the sticking phase, as the sharp changes in direction can make the stage slip before sticking action occurs.

Using a gradually increasing waveform like the ones seen below is a more optimal solution.

The velocity of the waveform starts off slowly and gradually increases speed, which allows it to reach higher driving frequencies without slipping and even a greater velocity at the end of the sticking phase – which increases the momentum of the surface A.

Let Fcr be the maximum driving frequency at which there still is sticking: it is desirable that the rapidly changing portions of the signal (slipping phase) be 4 times faster than Fcr and that the slowly changing portions of the signal be 4 times slower than Fcr.

1. Stiffness / stability of the entire assembly

Vibrations are naturally created by the piezo element. They are undesired and indicate lead to inefficiencies.

Manufacturing the chassis assembly out of a stiffer and heavier material and fixturing the assembly to a stable base reduces said vibrations and greatly increases the efficiency and reliability of the machine.

This is especially critical for stages with more than one axis stacked on top of one another. This is yet to be tested.

PCB Files on Github

PDu150 with a regular STM32 ADC was used for the testing below

PCB files above are the 2nd iteration on a custom board, with higher resolution ADC

Example Configuration that Works

VIDEO OF THE STAGE MOVING

OLD DRIVER BUT A BUNCH OF WEIGHT

1. Friction between and

We have a 3 mm square nickel-coated neodymium magnet and a precision ground stainless steel linear rail as the two surfaces causing friction.

1. Preload

We are using a 3mm square nickel-coated neodymium magnet that has 0.28kg pull and the magnetic attraction between the stainless steel linear rail and the magnet acts as the preload force.

1. Finish & consistency of and surfaces

We are using a 3mm square nickel-coated neodymium magnet as the surface and a stainless steel linear rail as the surface. The linear rail was chosen as the surface because it is precision ground and has an excellent surface finish and for the surface we are using the smoothest looking face of the magnet. Furthermore, both surfaces are handled with care to avoid scratches and burrs, kept clean, and cleaned with isopropyl alcohol.

1. Mass of A

The design starts performing the best when there is over 50g of mass on top of the carriage. If you are prototyping and just put something heavy on top of the carriage to test, certify the weight is properly fixed to the carriage and can’t move freely – which would just cause vibrations and a poor performance.

1. Waveform driving the piezo

The piezo element is driven with an 8 bit DAC and a PDu150 piezo driver. The waveform used is the same shown in the images in section “5. Waveform driving the piezo”, it has a peak voltage of 120V and a driving frequency of 1,400 Hz.

Previously, we used the BD150 driver, however, its slew rate was extremely low and the upgrade to the PDu150 driver showed very significant improvements.

BD150 slew rate = 12 V/us

PDu150 slew rate = 38 V/us

1. Stiffness / stability of the entire assembly

The most significant way this was handled was by attaching the piezo directly onto the linear slide and the magnet touching the rail. This ensures that all movement is directly transferred onto movement of the slide and less is lost due to compliance on other parts of the assembly.

Machining the main body of the actuator out of aluminum works well, however it is also working with a 3d-printed chassis out of PLA. Taping – or even just pressing down with your fingers – the assembly to a stiff plate or table solves vibration related problems.

VIDEO OF 3D PRINTED VERSION – SIDE MOUNTED MAGNET

VIDEO OF 3D PRINTED VERSIon – TOP MOUNTED MAGNET

1. Piezo element

We used this 4.6um draw distance piezo stack.

1. Linear rail and carriage

We are using these rail and carriages from McMacter.

Parameters

For more detaild process parameters:

Plasma Etch Process Sheet

Plasma Clean Process Sheet

Purpose

This first etch step creates the transistor’s gate by etching away almost all of the polysilicon and gate oxide, except for the islands covered by patterned photoresist. We use plasma etching (AKA dry etching) for two reasons:

1. Plasma is capable of etching silicon, whereas HF is not.

2. The anisotropic (vertical) etch profile is capable of transferring smaller patterns than isotropic etches.

The plasma etcher breaks down the normally inert SF6, creating a fluorine ion containing plasma on the surface of the chip. A combination of physical bombardment and chemical reaction removes material from the surface. Physical bombardment occurs when the pressure is low (<~.1 Torr) and results in an anisotropic (vertical) etch. This allows for precise transfer of a photoresist pattern onto the underlying material. Chemical etching dominates at higher pressures and results in an isotropic etch. Fluorine reacts more quickly with Si than SiO2, resulting in high selectivity.

Tools

1. PE-25 Plasma Etcher

Materials

1. Chip with patterned resist on Si

2. Acetone

3. Isopropanol

Procedure

Preparation

1. If you have already claimed a chip number, and opened its specific chip view data sheet, record your patterning data into that sheet. If you have NOT claimed a chip number, and have NOT begun recording data in a chip specific sheet, open this central chip count sheet, claim the next available chip number, open the blank chip view sheet for that specific chip number and record all subsequent process data into it.

2. Turn on the etcher via the switch on the back panel.

3. Turn on the laptop and open the Plasma Etch app.

4. Turn on the RF power supply on top of the etcher.

5. Open the chamber and place your chip in the middle of the rack. Close the chamber.

6. Set O2 flow, SF6 flow, power, time, vacuum setpoint in Sequence screen. Save your sequence.

Etching

1. At the top menu bar, go to power and turn on RF and vacuum. The pump will start.

2. Wait until the pressure (the number next to "vacuum") is below .1 Torr.

3. Go to commands > cycle off. This will purge the chamber for three seconds with nitrogen in order to remove H2O. If any water is in the chamber during the plasma it will react with fluorine to make HF. Very bad.

4. Commands > standby. This will start the pump again.

5. Repeat steps 2-4 to purge again. This makes sure no water is in the chamber.

6. Open the valve on the cylinders of gas that you are using. Lefty loosey.

1. When you are ready to start etching, select commands > plasma.

2. During the etch, monitor the pressure on the screen (should be at your setpoint) and the outlet pressure on the regulator (should be around 5-15 psig). Look in the window for pretty plasma!

3. SHUT THE GAS CYLINDER. RIGHTY TIGHTY

4. At the end of the cycle, the etcher will purge itself once, pump down, then purge again. To be safe we’ll purge a third time:

5. Commands > standby. This will start the pump again.

6. Wait until the pressure is below .1 Torr.

7. Commands > cycle off. Lets gas in for 3 seconds

8. Commands > standby.

9. Wait until the pressure is below .1 Torr.

10. Commands > shutdown. The chamber will come to atmosphere in 30 seconds, at which point you can open it.

O2 Plasma Cleaning

The procedure is the same as for silicon etching, but you may skip a purge before and after the plasma. This is because

Safety

SF6 is not toxic, but fluorine is. By purging before and after the plasma, we’re trying to prevent two things:

1. Purging before removes all water from the chamber. This prevents any HF from being formed, which would otherwise corrode the pump and exhaust. If the exhaust hose connected to the pump turns green, this is an indication that HF is being formed.

2. Purging after removes all reaction products from the chamber. This includes SiF4 and various other sulfur oxides.

Process Parameters

Purpose

Three types of "spin on glass" are currently used in the Hacker Fab. 700B, P504, and B154, all three sourced from Filmtronics. Each of these begin as liquids, which are spun onto the surface of the chip, then annealed to form solid thin films. This is known as a sol-gel process.

700B becomes an undoped thin film of SiO2, but with lower density than a thermally grown SiO2. After high temperature exposure (~1100C) this thin film densifies to the density of a thermally grown oxide.

P504 becomes a thin film of SiO2, with a small amount of Phosphorous in it, also with lower density than a thermally grown SiO2. This is also referred to as a "spin on diffusant." After high temperature diffusion (~1100C) this thin film densifies to the density of a thermally grown oxide.

B154 does not have SiO2 precursors like 700B and P504, but becomes a solid thin film with a small amount of Boron in it. The composition of this solid film after relatively low temperature exposure (~200) is not clear, since the formula is proprietary, but it is believed to be some sort of polymer. Upon diffusion (exposure around ~1100C) the B154 thin film becomes SiO2 of thermally grown density.

These spin on glass films are often etched with a dilute HF solution, or BOE (HF + NH4F) due to the high selectivity with Si. However, the etch rate of spin on glass annealed around 400C is much faster than that of spin on glass that has been densified at around 1100C. Additionally, the B154 film that has been annealed at 200C is not effectively etched with HF, but is effectively etched with HF after diffusion at 1100C.

As indicated above, the purpose of the P504 and B154 deposition is to create a dopant source at the surface of the silicon, which can be diffused into the silicon substrate. 700B is used as a diffusion barrier, or a dielectric layer to fabricate metal interconnects on top of.

Defects

The main concern with spin on glass, is its tendency to crack (extent of cracking varies, but full shatter can occur leading to flake off), have variation in uniformity, and have pinholes. Cracks and pinholes can lead to uneven doping across the surface, failure of 700B to act as a diffusion barrier, or metal interconnects shorting to the Si below. Factors like humidity, annealing temperature profile, particulate contamination, and shelf life of the spin on glass solution.

However, the CMU Hacker Fab has found particulate contamination to be the number one cause of defects, and this issue has been mitigated greatly by using filtered syringe tips during deposition, as seen below in the procedure.

Tools

Materials

1. Filmtronics 700B, P504, or B154.

2. Acetone

3. Isopropanol

Procedure

Wafer Cleaning

1. Check that the working volume of spin on glass is labeled with the date it was poured. For 700B and P504, ensure that the solution has not been out for more than a month (main bottle is stored at 5C).

   1. If you are pouring a new working volume of P504 or 700B, let it come to room temperature before using it (ideally, wait 24 hours).

2. Preheat the to 100°C

3. In the fume hood, hold the wafer with tweezers over the sink.

4. Rinse the polished side of the wafer thoroughly with acetone, then isopropyl alcohol.

   1. The acetone leaves a residue that must be removed by the isopropyl alcohol rinse.

5. Blow the wafer dry with the nitrogen gun by pressing the wafer against a cleanroom wipe on the table to ensure it does not fly away. Get a good grip on it with your tweezers.

   1. Even when the wafer appears dry, there may still be moisture on the edges, so dry both sides liberally for ~20 seconds

   2. if there is visible acetone residue after drying, repeat steps 2-3

Prebake

1. Place the wafer in the center of the hotplate for 20 seconds

   1. Be sure to handle the wafer with tweezers that can handle high temperatures (metal tweezers)

   2. No need to turn the hotplate off since annealing will require 100°C initially as well

Spin Coat

1. Place wafer onto the chuck of the

2. Open the SOG container while keeping the bottom resting on the table

   1. Never open containers up in the air or outside of the fume hood

3. Pipette 1-2 drop of SOG using Luer Lock filtered syringe:

   1. Take a clean syringe and draw it up ~½ to create an air pocket in the tube

   2. Suck up SOG about halfway up the syringe. This is a lot more than you need for 1 drop, because the filter needs to be wetted by the excess solution before drops are released.

   3. Twist on a syringe filter

   4. Release 2 drops back into the SOG container

   5. Apply 1 or 2 drops to your chip, make sure the chip is completely coated in solution but do not use more than 2 drops

   6. Dump any remaining SOG in the syringe back into the SOG container

   7. Dispose of the syringe and the filter in the waste bucket