> For the complete documentation index, see [llms.txt](https://docs.hackerfab.org/home/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://docs.hackerfab.org/home/working-docs/cmos-doping-process-development.md).

# CMOS Doping Process Development

Dope the channel, and source/drain regions for CMOS chips, via solid source surface diffusion, starting with 5-10 ohm p-type substrate.

### Metrics

| CMOS Region       | Doping level                                                              | Doping Profile Details                                               |
| ----------------- | ------------------------------------------------------------------------- | -------------------------------------------------------------------- |
| NMOS Source/Drain | 1E19 - 1E20 /cm^3 (Boron)                                                 | <p>Uniform over 2 nm<br>Junction depth shallower than channel</p>    |
| NMOS Channel      | 1E14 - 1E15 /cm^3 (Boron)                                                 | Will be uniform by default (p type wafers)                           |
| PMOS Source/Drain | 1E20 - 1E21 /cm^3 (Boron) with 1E15 - 1E16 /cm^3 (Phosphorous) background | <p>Uniform over 2 nm<br>Junction depth shallower than channel</p>    |
| PMOS Channel      | 1E15 - 1E16 /cm^3 (Phosphorous) with 1E14 - 1E15 /cm^3 (Boron) background | <p>Uniform over 10 nm<br>Junction depth deeper than source/drain</p> |

Working Folder in Google Drive: <https://drive.google.com/drive/folders/1bnJyeBcbssFuE7fQBo4J-6Roz3mHzRwJ>


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